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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2009-04-20 03:54:59 +0200
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-06-11 21:04:06 +0200
commit67b5db6502ddd27d65dea43bf036abbd82d0dfc9 (patch)
treec48ed504f52682b88f91e82a50586013410edd7f /drivers
parentPCI: ibmphp_core.c: fix warning due to missing module_exit() (diff)
downloadlinux-67b5db6502ddd27d65dea43bf036abbd82d0dfc9.tar.xz
linux-67b5db6502ddd27d65dea43bf036abbd82d0dfc9.zip
PCI MSI: Define PCI_MSI_MASK_32/64
Impact: cleanup, improve readability Define PCI_MSI_MASK_32/64 for 32/64bit devices, instead of using implicit offset (-4), "PCI_MSI_MASK_BIT - 4" and "PCI_MSI_MASK_BIT". Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/msi.c2
-rw-r--r--drivers/pci/msi.h6
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 362773247fbf..7ffac27d5d4a 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -381,7 +381,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
entry->msi_attrib.pos = pos;
- entry->mask_pos = msi_mask_bits_reg(pos, entry->msi_attrib.is_64);
+ entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64);
/* All MSIs are unmasked by default, Mask them all */
if (entry->msi_attrib.maskbit)
pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index 4fed59261952..a0662842550b 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -16,9 +16,9 @@
#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)
#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI)
#define msi_data_reg(base, is64bit) \
- ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 )
-#define msi_mask_bits_reg(base, is64bit) \
- ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4)
+ (base + ((is64bit == 1) ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32))
+#define msi_mask_reg(base, is64bit) \
+ (base + ((is64bit == 1) ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32))
#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT))
#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT))