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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-01-21 18:37:59 +0100 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-01-27 09:51:09 +0100 |
commit | eb973a5e1b780f9f7e1b5b676aaaac75492989bf (patch) | |
tree | d211e023f0027cd076e74a69c30eaced30780e39 /drivers | |
parent | drm/i915: Implement Wa4x4STCOptimizationDisable:chv (diff) | |
download | linux-eb973a5e1b780f9f7e1b5b676aaaac75492989bf.tar.xz linux-eb973a5e1b780f9f7e1b5b676aaaac75492989bf.zip |
drm/i915: Drop some more CHV pre-production workarounds
Drop WaDisablePwrmtrEvent:chv as it's no longer needed.
Also remove the WaSetMaskForGfxBusyness:chv note, but we still
leave the GEN6_RP_MEDIA_IS_GFX bit enabled as that's still the
recommended setting.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 4f7a2a52feef..e94371e05016 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4789,14 +4789,10 @@ static void cherryview_enable_rps(struct drm_device *dev) I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10); - /* WaDisablePwrmtrEvent:chv (pre-production hw) */ - I915_WRITE(0xA80C, I915_READ(0xA80C) & 0x00ffffff); - I915_WRITE(0xA810, I915_READ(0xA810) & 0xffffff00); - /* 5: Enable RPS */ I915_WRITE(GEN6_RP_CONTROL, GEN6_RP_MEDIA_HW_NORMAL_MODE | - GEN6_RP_MEDIA_IS_GFX | /* WaSetMaskForGfxBusyness:chv (pre-production hw ?) */ + GEN6_RP_MEDIA_IS_GFX | GEN6_RP_ENABLE | GEN6_RP_UP_BUSY_AVG | GEN6_RP_DOWN_IDLE_AVG); |