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authorBaruch Siach <baruch@tkos.co.il>2010-10-27 09:03:52 +0200
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-12-20 17:10:56 +0100
commit42cc37fe20cc680fb58fe12ae5ba718d683b8ca2 (patch)
tree4564e462eff60f1e91449b4abb2e859b0b8880c0 /drivers
parent[media] gspca - sonixj: Better handling of the bridge registers 0x01 and 0x17 (diff)
downloadlinux-42cc37fe20cc680fb58fe12ae5ba718d683b8ca2.tar.xz
linux-42cc37fe20cc680fb58fe12ae5ba718d683b8ca2.zip
[media] mx2_camera: fix pixel clock polarity configuration
When SOCAM_PCLK_SAMPLE_FALLING, just leave CSICR1_REDGE unset, otherwise we get the inverted behaviour. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/media/video/mx2_camera.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c
index 072bd2d1cfad..13565cba237d 100644
--- a/drivers/media/video/mx2_camera.c
+++ b/drivers/media/video/mx2_camera.c
@@ -807,8 +807,6 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd,
if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
csicr1 |= CSICR1_REDGE;
- if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
- csicr1 |= CSICR1_INV_PCLK;
if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
csicr1 |= CSICR1_SOF_POL;
if (common_flags & SOCAM_HSYNC_ACTIVE_HIGH)