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| author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-11-16 20:45:23 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-11-16 20:45:23 +0100 |
| commit | 626db29f31ce253726411182ff6c15e31efe2e9a (patch) | |
| tree | 5a4f1f01eafa3eae7c79c4c066f09dedb0975ec7 /drivers | |
| parent | Merge branch 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/li... (diff) | |
| parent | [TG3]: Disable TSO on 5906 if CLKREQ is enabled. (diff) | |
| download | linux-626db29f31ce253726411182ff6c15e31efe2e9a.tar.xz linux-626db29f31ce253726411182ff6c15e31efe2e9a.zip | |
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6:
[TG3]: Disable TSO on 5906 if CLKREQ is enabled.
[TCP]: Fix up sysctl_tcp_mem initialization.
[NETFILTER]: ip6_tables: use correct nexthdr value in ipv6_find_hdr()
[NETFILTER]: ip6_tables: fixed conflicted optname for getsockopt
[NETFILTER]: Use pskb_trim in {ip,ip6,nfnetlink}_queue
[NETFILTER]: nfnetlink_log: fix byteorder of NFULA_SEQ_GLOBAL
[TG3]: Increase 5906 firmware poll time.
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/tg3.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 06e4f77b0988..1dbdd6bb587b 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -68,8 +68,8 @@ #define DRV_MODULE_NAME "tg3" #define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "3.68" -#define DRV_MODULE_RELDATE "November 02, 2006" +#define DRV_MODULE_VERSION "3.69" +#define DRV_MODULE_RELDATE "November 15, 2006" #define TG3_DEF_MAC_MODE 0 #define TG3_DEF_RX_MODE 0 @@ -4728,10 +4728,11 @@ static int tg3_poll_fw(struct tg3 *tp) u32 val; if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { - for (i = 0; i < 400; i++) { + /* Wait up to 20ms for init done. */ + for (i = 0; i < 200; i++) { if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE) return 0; - udelay(10); + udelay(100); } return -ENODEV; } @@ -10365,7 +10366,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) u32 pci_state_reg, grc_misc_cfg; u32 val; u16 pci_cmd; - int err; + int err, pcie_cap; /* Force memory write invalidate off. If we leave it on, * then on 5700_BX chips we have to enable a workaround. @@ -10540,8 +10541,19 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; - if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) + pcie_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP); + if (pcie_cap != 0) { tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS; + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { + u16 lnkctl; + + pci_read_config_word(tp->pdev, + pcie_cap + PCI_EXP_LNKCTL, + &lnkctl); + if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) + tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2; + } + } /* If we have an AMD 762 or VIA K8T800 chipset, write * reordering to the mailbox registers done by the host @@ -11808,6 +11820,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 || tp->pci_chip_rev_id == CHIPREV_ID_5705_A0 || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 || (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) { tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; } else { |