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authorBjorn Helgaas <bhelgaas@google.com>2012-12-05 21:51:20 +0100
committerBjorn Helgaas <bhelgaas@google.com>2012-12-07 19:19:54 +0100
commitb9d146e30a2d855229f0944152f84aef1a21553b (patch)
treeefb7abc2711019cf40e74d709652339b25dc5171 /drivers
parentiwlegacy: Use standard #defines for PCIe Capability ASPM fields (diff)
downloadlinux-b9d146e30a2d855229f0944152f84aef1a21553b.tar.xz
linux-b9d146e30a2d855229f0944152f84aef1a21553b.zip
iwlwifi: collapse wrapper for pcie_capability_read_word()
iwl_pciexp_link_ctrl() has only one call site and no longer provides any useful abstraction, so collapse it into the caller. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Johannes Berg <johannes.berg@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/iwlwifi/pcie/trans.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c
index fe0fffd04304..5cd06b3246fe 100644
--- a/drivers/net/wireless/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/iwlwifi/pcie/trans.c
@@ -673,18 +673,11 @@ static void iwl_set_pwr_vmain(struct iwl_trans *trans)
#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
-static u16 iwl_pciexp_link_ctrl(struct iwl_trans *trans)
+static void iwl_apm_config(struct iwl_trans *trans)
{
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
- u16 pci_lnk_ctl;
-
- pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL,
- &pci_lnk_ctl);
- return pci_lnk_ctl;
-}
+ u16 lctl;
-static void iwl_apm_config(struct iwl_trans *trans)
-{
/*
* HW bug W/A for instability in PCIe bus L0S->L1 transition.
* Check if BIOS (or OS) enabled L1-ASPM on this device.
@@ -693,8 +686,8 @@ static void iwl_apm_config(struct iwl_trans *trans)
* If not (unlikely), enable L0S, so there is at least some
* power savings, even without L1.
*/
- u16 lctl = iwl_pciexp_link_ctrl(trans);
+ pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl);
if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
PCI_CFG_LINK_CTRL_VAL_L1_EN) {
/* L1-ASPM enabled; disable(!) L0S */