diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-11-21 20:54:28 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-12-03 09:29:38 +0100 |
| commit | 408d4b9e1f0159583e81e093b3e7fe12a9b1072f (patch) | |
| tree | f0ac6410bfe6e0f33365de25065b5e68e1745b83 /drivers | |
| parent | drm/i915: Implement GPU reset for 915/945 (diff) | |
| download | linux-408d4b9e1f0159583e81e093b3e7fe12a9b1072f.tar.xz linux-408d4b9e1f0159583e81e093b3e7fe12a9b1072f.zip | |
drm/i915: Implement GPU reset for g33
g33 seems to sit somewhere between the 915/945/965 style and the
g4x style. The bits look like g4x, but we still need to do a full
reset including display.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 12 |
2 files changed, 13 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 44abd7b0051d..5066fd105512 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -881,8 +881,8 @@ int i915_reset(struct drm_device *dev) if (INTEL_INFO(dev)->gen > 5) intel_reset_gt_powersave(dev); - if ((IS_GEN3(dev) && !IS_G33(dev)) || - (IS_GEN4(dev) && !IS_G4X(dev))) { + + if (IS_GEN3(dev) || (IS_GEN4(dev) && !IS_G4X(dev))) { intel_runtime_pm_disable_interrupts(dev_priv); intel_runtime_pm_enable_interrupts(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 68dc32058587..cf8ecc01deb4 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1369,6 +1369,14 @@ static int g4x_reset_complete(struct drm_device *dev) return (gdrst & GRDOM_RESET_ENABLE) == 0; } +static int g33_do_reset(struct drm_device *dev) +{ + /* FIXME spec says to turn off all planes and wait 1 usec before reset */ + + pci_write_config_byte(dev->pdev, I915_GDRST, GRDOM_RESET_ENABLE); + return wait_for(g4x_reset_complete(dev), 500); +} + static int g4x_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -1452,7 +1460,9 @@ int intel_gpu_reset(struct drm_device *dev) return ironlake_do_reset(dev); else if (IS_G4X(dev)) return g4x_do_reset(dev); - else if (IS_GEN4(dev) || (IS_GEN3(dev) && !IS_G33(dev))) + else if (IS_G33(dev)) + return g33_do_reset(dev); + else if (INTEL_INFO(dev)->gen >= 3) return i915_do_reset(dev); else return -ENODEV; |