diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2016-12-01 16:45:51 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-12-07 15:23:39 +0100 |
| commit | e7a718f9b1c106dc7705d96cf0fe2e2f69089cf9 (patch) | |
| tree | f284b4160fd7ada811a31bb72edc283a991ba2fb /drivers | |
| parent | gpio: chardev: Return error for seek operations (diff) | |
| download | linux-e7a718f9b1c106dc7705d96cf0fe2e2f69089cf9.tar.xz linux-e7a718f9b1c106dc7705d96cf0fe2e2f69089cf9.zip | |
gpio: merrifield: Add support for hardware debouncer
By default all pins are configured to use a glitch filter. Writing 1 to the
certain bit of the specific register might be useful in case someone needs to
bypass the glitch filter completely for a given GPIO pin.
This patch adds support for that in the Intel Merrifield GPIO driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpio/gpio-merrifield.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c index 82cdcdc779bb..d7cbbc0fc47b 100644 --- a/drivers/gpio/gpio-merrifield.c +++ b/drivers/gpio/gpio-merrifield.c @@ -161,6 +161,27 @@ static int mrfld_gpio_direction_output(struct gpio_chip *chip, return 0; } +static int mrfld_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset, + unsigned int debounce) +{ + struct mrfld_gpio *priv = gpiochip_get_data(chip); + void __iomem *gfbr = gpio_reg(chip, offset, GFBR); + unsigned long flags; + u32 value; + + raw_spin_lock_irqsave(&priv->lock, flags); + + if (debounce) + value = readl(gfbr) & ~BIT(offset % 32); + else + value = readl(gfbr) | BIT(offset % 32); + writel(value, gfbr); + + raw_spin_unlock_irqrestore(&priv->lock, flags); + + return 0; +} + static void mrfld_irq_ack(struct irq_data *d) { struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d); @@ -384,6 +405,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id priv->chip.direction_output = mrfld_gpio_direction_output; priv->chip.get = mrfld_gpio_get; priv->chip.set = mrfld_gpio_set; + priv->chip.set_debounce = mrfld_gpio_set_debounce; priv->chip.base = gpio_base; priv->chip.ngpio = MRFLD_NGPIO; priv->chip.can_sleep = false; |