diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2015-07-31 02:20:57 +0200 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2015-08-25 01:49:00 +0200 |
| commit | 203e118bd58c48905a82b4161db5441e5c5041f2 (patch) | |
| tree | a28fd6a605d1905742d35d39706bead291848177 /drivers | |
| parent | clk: versatile: Switch to assigned clock parents (diff) | |
| download | linux-203e118bd58c48905a82b4161db5441e5c5041f2.tar.xz linux-203e118bd58c48905a82b4161db5441e5c5041f2.zip | |
drm/msm/dsi: Convert to clk_hw based provider APIs
We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.
Cc: Wentao Xu <wentaox@codeaurora.org>
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c index eb8ac3097ff5..18b7727bdc57 100644 --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c @@ -455,7 +455,7 @@ static void dsi_pll_28nm_save_state(struct msm_dsi_pll *pll) cached_state->postdiv1 = pll_read(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG); cached_state->byte_mux = pll_read(base + REG_DSI_28nm_PHY_PLL_VREG_CFG); - cached_state->vco_rate = __clk_get_rate(pll->clk_hw.clk); + cached_state->vco_rate = clk_hw_get_rate(&pll->clk_hw); } static int dsi_pll_28nm_restore_state(struct msm_dsi_pll *pll) @@ -466,7 +466,7 @@ static int dsi_pll_28nm_restore_state(struct msm_dsi_pll *pll) int ret; if ((cached_state->vco_rate != 0) && - (cached_state->vco_rate == __clk_get_rate(pll->clk_hw.clk))) { + (cached_state->vco_rate == clk_hw_get_rate(&pll->clk_hw))) { ret = dsi_pll_28nm_clk_set_rate(&pll->clk_hw, cached_state->vco_rate, 0); if (ret) { |