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authorAlex Deucher <alexander.deucher@amd.com>2014-08-18 22:51:46 +0200
committerAlex Deucher <alexander.deucher@amd.com>2014-08-19 17:29:22 +0200
commit73ef0e0d62de4a8d40d34a6f645faee2f6e1ac33 (patch)
tree1e788e78c8584fdf18227539ccd721223b72b3e1 /drivers
parentdrm/radeon: fix pm handling in radeon_gpu_reset (diff)
downloadlinux-73ef0e0d62de4a8d40d34a6f645faee2f6e1ac33.tar.xz
linux-73ef0e0d62de4a8d40d34a6f645faee2f6e1ac33.zip
drm/radeon: fix display handling in radeon_gpu_reset
If the display hw was reset or a hard reset was used, we need to re-init some of the common display hardware as well. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 8e6187055061..6a219bcee66d 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1681,6 +1681,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
/* block TTM */
resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev);
radeon_suspend(rdev);
+ radeon_hpd_fini(rdev);
for (i = 0; i < RADEON_NUM_RINGS; ++i) {
ring_sizes[i] = radeon_ring_backup(rdev, &rdev->ring[i],
@@ -1737,6 +1738,21 @@ retry:
radeon_pm_resume(rdev);
}
+ /* init dig PHYs, disp eng pll */
+ if (rdev->is_atom_bios) {
+ radeon_atom_encoder_init(rdev);
+ radeon_atom_disp_eng_pll_init(rdev);
+ /* turn on the BL */
+ if (rdev->mode_info.bl_encoder) {
+ u8 bl_level = radeon_get_backlight_level(rdev,
+ rdev->mode_info.bl_encoder);
+ radeon_set_backlight_level(rdev, rdev->mode_info.bl_encoder,
+ bl_level);
+ }
+ }
+ /* reset hpd state */
+ radeon_hpd_init(rdev);
+
drm_helper_resume_force_mode(rdev->ddev);
/* set the power state here in case we are a PX system or headless */