diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-04-28 19:19:27 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-05-27 13:31:42 +0200 |
| commit | 0425662fdf05665235e768e2fbcb4ced12432b43 (patch) | |
| tree | cd30a29436dc6baa9b0e505e046547bd96d31111 /drivers | |
| parent | drm/i915: Introduce some local intel_dp variables (diff) | |
| download | linux-0425662fdf05665235e768e2fbcb4ced12432b43.tar.xz linux-0425662fdf05665235e768e2fbcb4ced12432b43.zip | |
drm: Nuke mode->vrefresh
Get rid of mode->vrefresh and just calculate it on demand. Saves
a bit of space and avoids the cached value getting out of sync
with reality.
Mostly done with cocci, with the following manual fixups:
- Remove the now empty loop in drm_helper_probe_single_connector_modes()
- Fix __MODE() macro in ch7006_mode.c
- Fix DRM_MODE_ARG() macro in drm_modes.h
- Remove leftover comment from samsung_s6d16d0_mode
- Drop the TODO
@@
@@
struct drm_display_mode {
...
- int vrefresh;
...
};
@@
identifier N;
expression E;
@@
struct drm_display_mode N = {
- .vrefresh = E
};
@@
identifier N;
expression E;
@@
struct drm_display_mode N[...] = {
...,
{
- .vrefresh = E
}
,...
};
@@
expression E;
@@
{
DRM_MODE(...),
- .vrefresh = E,
}
@@
identifier M, R;
@@
int drm_mode_vrefresh(const struct drm_display_mode *M)
{
...
- if (M->vrefresh > 0)
- R = M->vrefresh;
- else
if (...) {
...
}
...
}
@@
struct drm_display_mode *p;
expression E;
@@
(
- p->vrefresh = E;
|
- p->vrefresh
+ drm_mode_vrefresh(p)
)
@@
struct drm_display_mode s;
expression E;
@@
(
- s.vrefresh = E;
|
- s.vrefresh
+ drm_mode_vrefresh(&s)
)
@@
expression E;
@@
- drm_mode_vrefresh(E) ? drm_mode_vrefresh(E) : drm_mode_vrefresh(E)
+ drm_mode_vrefresh(E)
@find_substruct@
identifier X;
identifier S;
@@
struct X {
...
struct drm_display_mode S;
...
};
@@
identifier find_substruct.S;
expression E;
identifier I;
@@
{
.S = {
- .vrefresh = E
}
}
@@
identifier find_substruct.S;
identifier find_substruct.X;
expression E;
identifier I;
@@
struct X I[...] = {
...,
.S = {
- .vrefresh = E
}
,...
};
v2: Drop TODO
v3: Rebase
v4: Rebase
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: CK Hu <ck.hu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Jerry Han <hanxu5@huaqin.corp-partner.google.com>
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefan Mavrodiev <stefan@olimex.com>
Cc: Robert Chiras <robert.chiras@nxp.com>
Cc: "Guido Günther" <agx@sigxcpu.org>
Cc: Purism Kernel Team <kernel@puri.sm>
Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: Vincent Abriou <vincent.abriou@st.com>
Cc: VMware Graphics <linux-graphics-maintainer@vmware.com>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Cc: linux-amlogic@lists.infradead.org
Cc: nouveau@lists.freedesktop.org
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200428171940.19552-4-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers')
66 files changed, 217 insertions, 394 deletions
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index 6dad025f8da7..19d8ae59ea03 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -360,7 +360,7 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge, buf[0] = pixel_clock_10kHz & 0xff; buf[1] = pixel_clock_10kHz >> 8; - buf[2] = adj->vrefresh; + buf[2] = drm_mode_vrefresh(adj); buf[3] = 0x00; buf[4] = adj->hdisplay; buf[5] = adj->hdisplay >> 8; diff --git a/drivers/gpu/drm/drm_client_modeset.c b/drivers/gpu/drm/drm_client_modeset.c index d0778bb159bc..b7e9e1c2564c 100644 --- a/drivers/gpu/drm/drm_client_modeset.c +++ b/drivers/gpu/drm/drm_client_modeset.c @@ -186,7 +186,7 @@ again: continue; if (cmdline_mode->refresh_specified) { - if (mode->vrefresh != cmdline_mode->refresh) + if (drm_mode_vrefresh(mode) != cmdline_mode->refresh) continue; } diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 3bd95c4b02eb..57cac677269d 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -719,662 +719,662 @@ static const struct drm_display_mode edid_cea_modes_1[] = { { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 2 - 720x480@60Hz 4:3 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 3 - 720x480@60Hz 16:9 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 4 - 1280x720@60Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 5 - 1920x1080i@60Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 6 - 720(1440)x480i@60Hz 4:3 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 7 - 720(1440)x480i@60Hz 16:9 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 8 - 720(1440)x240@60Hz 4:3 */ { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 9 - 720(1440)x240@60Hz 16:9 */ { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 10 - 2880x480i@60Hz 4:3 */ { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 11 - 2880x480i@60Hz 16:9 */ { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 12 - 2880x240@60Hz 4:3 */ { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 13 - 2880x240@60Hz 16:9 */ { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 14 - 1440x480@60Hz 4:3 */ { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 15 - 1440x480@60Hz 16:9 */ { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 16 - 1920x1080@60Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 17 - 720x576@50Hz 4:3 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 18 - 720x576@50Hz 16:9 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 19 - 1280x720@50Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 20 - 1920x1080i@50Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 21 - 720(1440)x576i@50Hz 4:3 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 22 - 720(1440)x576i@50Hz 16:9 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 23 - 720(1440)x288@50Hz 4:3 */ { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 24 - 720(1440)x288@50Hz 16:9 */ { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 25 - 2880x576i@50Hz 4:3 */ { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 26 - 2880x576i@50Hz 16:9 */ { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 27 - 2880x288@50Hz 4:3 */ { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 28 - 2880x288@50Hz 16:9 */ { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 29 - 1440x576@50Hz 4:3 */ { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 30 - 1440x576@50Hz 16:9 */ { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 31 - 1920x1080@50Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 32 - 1920x1080@24Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 33 - 1920x1080@25Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 34 - 1920x1080@30Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 35 - 2880x480@60Hz 4:3 */ { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 36 - 2880x480@60Hz 16:9 */ { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 37 - 2880x576@50Hz 4:3 */ { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 38 - 2880x576@50Hz 16:9 */ { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 39 - 1920x1080i@50Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 40 - 1920x1080i@100Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 41 - 1280x720@100Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 42 - 720x576@100Hz 4:3 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 43 - 720x576@100Hz 16:9 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 44 - 720(1440)x576i@100Hz 4:3 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 45 - 720(1440)x576i@100Hz 16:9 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 46 - 1920x1080i@120Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 47 - 1280x720@120Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 48 - 720x480@120Hz 4:3 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 49 - 720x480@120Hz 16:9 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 50 - 720(1440)x480i@120Hz 4:3 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 51 - 720(1440)x480i@120Hz 16:9 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 52 - 720x576@200Hz 4:3 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 53 - 720x576@200Hz 16:9 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 54 - 720(1440)x576i@200Hz 4:3 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 55 - 720(1440)x576i@200Hz 16:9 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 56 - 720x480@240Hz 4:3 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 57 - 720x480@240Hz 16:9 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 58 - 720(1440)x480i@240Hz 4:3 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 59 - 720(1440)x480i@240Hz 16:9 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 60 - 1280x720@24Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 61 - 1280x720@25Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 3740, 3960, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 62 - 1280x720@30Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 63 - 1920x1080@120Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 64 - 1920x1080@100Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 65 - 1280x720@24Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 66 - 1280x720@25Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 3740, 3960, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 67 - 1280x720@30Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 68 - 1280x720@50Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 69 - 1280x720@60Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 70 - 1280x720@100Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 71 - 1280x720@120Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 72 - 1920x1080@24Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 73 - 1920x1080@25Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 74 - 1920x1080@30Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 75 - 1920x1080@50Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 76 - 1920x1080@60Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 77 - 1920x1080@100Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 78 - 1920x1080@120Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 79 - 1680x720@24Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 80 - 1680x720@25Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908, 2948, 3168, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 81 - 1680x720@30Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380, 2420, 2640, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 82 - 1680x720@50Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940, 1980, 2200, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 83 - 1680x720@60Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940, 1980, 2200, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 84 - 1680x720@100Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740, 1780, 2000, 0, 720, 725, 730, 825, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 85 - 1680x720@120Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740, 1780, 2000, 0, 720, 725, 730, 825, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 86 - 2560x1080@24Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558, 3602, 3750, 0, 1080, 1084, 1089, 1100, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 87 - 2560x1080@25Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008, 3052, 3200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 88 - 2560x1080@30Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328, 3372, 3520, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 89 - 2560x1080@50Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108, 3152, 3300, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 90 - 2560x1080@60Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808, 2852, 3000, 0, 1080, 1084, 1089, 1100, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 91 - 2560x1080@100Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778, 2822, 2970, 0, 1080, 1084, 1089, 1250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 92 - 2560x1080@120Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108, 3152, 3300, 0, 1080, 1084, 1089, 1250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 93 - 3840x2160@24Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 94 - 3840x2160@25Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 95 - 3840x2160@30Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 96 - 3840x2160@50Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 97 - 3840x2160@60Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 98 - 4096x2160@24Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 99 - 4096x2160@25Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064, 5152, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 100 - 4096x2160@30Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184, 4272, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 101 - 4096x2160@50Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064, 5152, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 102 - 4096x2160@60Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184, 4272, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 103 - 3840x2160@24Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 104 - 3840x2160@25Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 105 - 3840x2160@30Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 106 - 3840x2160@50Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 107 - 3840x2160@60Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 108 - 1280x720@48Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240, 2280, 2500, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 109 - 1280x720@48Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240, 2280, 2500, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 110 - 1680x720@48Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 2490, 2530, 2750, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 111 - 1920x1080@48Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 112 - 1920x1080@48Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 113 - 2560x1080@48Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 3558, 3602, 3750, 0, 1080, 1084, 1089, 1100, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 114 - 3840x2160@48Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 115 - 4096x2160@48Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 116 - 3840x2160@48Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 117 - 3840x2160@100Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 118 - 3840x2160@120Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 119 - 3840x2160@100Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 120 - 3840x2160@120Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 121 - 5120x2160@24Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 7116, 7204, 7500, 0, 2160, 2168, 2178, 2200, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 122 - 5120x2160@25Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 6816, 6904, 7200, 0, 2160, 2168, 2178, 2200, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 123 - 5120x2160@30Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 5784, 5872, 6000, 0, 2160, 2168, 2178, 2200, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 124 - 5120x2160@48Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5866, 5954, 6250, 0, 2160, 2168, 2178, 2475, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 125 - 5120x2160@50Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 6216, 6304, 6600, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 126 - 5120x2160@60Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5284, 5372, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 127 - 5120x2160@100Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 6216, 6304, 6600, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, }; /* @@ -1387,137 +1387,137 @@ static const struct drm_display_mode edid_cea_modes_193[] = { { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284, 5372, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 194 - 7680x4320@24Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 195 - 7680x4320@25Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 196 - 7680x4320@30Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 197 - 7680x4320@48Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 198 - 7680x4320@50Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 199 - 7680x4320@60Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 200 - 7680x4320@100Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792, 9968, 10560, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 201 - 7680x4320@120Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032, 8208, 8800, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 202 - 7680x4320@24Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 203 - 7680x4320@25Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 204 - 7680x4320@30Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 205 - 7680x4320@48Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 206 - 7680x4320@50Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 207 - 7680x4320@60Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 208 - 7680x4320@100Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792, 9968, 10560, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 209 - 7680x4320@120Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032, 8208, 8800, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 210 - 10240x4320@24Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732, 11908, 12500, 0, 4320, 4336, 4356, 4950, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 211 - 10240x4320@25Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732, 12908, 13500, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 212 - 10240x4320@30Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528, 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 213 - 10240x4320@48Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732, 11908, 12500, 0, 4320, 4336, 4356, 4950, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 214 - 10240x4320@50Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732, 12908, 13500, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 215 - 10240x4320@60Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528, 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 216 - 10240x4320@100Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432, 12608, 13200, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 217 - 10240x4320@120Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528, 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 218 - 4096x2160@100Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 219 - 4096x2160@120Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184, 4272, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, }; /* @@ -1531,25 +1531,25 @@ static const struct drm_display_mode edid_4k_modes[] = { 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 2 - 3840x2160@25Hz */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 3 - 3840x2160@24Hz */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 4 - 4096x2160@24Hz (SMPTE) */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, }; /*** DDC fetch and block validation ***/ @@ -2145,10 +2145,8 @@ static void edid_fixup_preferred(struct drm_connector *connector, if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) preferred_mode = cur_mode; - cur_vrefresh = cur_mode->vrefresh ? - cur_mode->vrefresh : drm_mode_vrefresh(cur_mode); - preferred_vrefresh = preferred_mode->vrefresh ? - preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode); + cur_vrefresh = drm_mode_vrefresh(cur_mode); + preferred_vrefresh = drm_mode_vrefresh(preferred_mode); /* At a given size, try to get closest to target refresh */ if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) < @@ -2653,7 +2651,6 @@ set_size: } mode->type = DRM_MODE_TYPE_DRIVER; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_set_name(mode); return mode; @@ -3298,7 +3295,7 @@ cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) { unsigned int clock = cea_mode->clock; - if (cea_mode->vrefresh % 6 != 0) + if (drm_mode_vrefresh(cea_mode) % 6 != 0) return clock; /* @@ -3625,8 +3622,6 @@ drm_display_mode_from_vic_index(struct drm_connector *connector, if (!newmode) return NULL; - newmode->vrefresh = 0; - return newmode; } @@ -5161,7 +5156,6 @@ static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *d if (timings->flags & 0x80) mode->type |= DRM_MODE_TYPE_PREFERRED; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_set_name(mode); return mode; diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index fec1c33b3045..e3d5f011f7bd 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c @@ -759,9 +759,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode) { int refresh = 0; - if (mode->vrefresh > 0) - refresh = mode->vrefresh; - else if (mode->htotal > 0 && mode->vtotal > 0) { + if (mode->htotal > 0 && mode->vtotal > 0) { unsigned int num, den; num = mode->clock * 1000; @@ -1308,7 +1306,7 @@ static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head if (diff) return diff; - diff = b->vrefresh - a->vrefresh; + diff = drm_mode_vrefresh(b) - drm_mode_vrefresh(a); if (diff) return diff; @@ -1921,7 +1919,7 @@ void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out, out->vsync_end = in->vsync_end; out->vtotal = in->vtotal; out->vscan = in->vscan; - out->vrefresh = in->vrefresh; + out->vrefresh = drm_mode_vrefresh(in); out->flags = in->flags; out->type = in->type; @@ -1981,7 +1979,6 @@ int drm_mode_convert_umode(struct drm_device *dev, out->vsync_end = in->vsync_end; out->vtotal = in->vtotal; out->vscan = in->vscan; - out->vrefresh = in->vrefresh; out->flags = in->flags; /* * Old xf86-video-vmware (possibly others too) used to diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c index 466dfbba8256..26e997f1524f 100644 --- a/drivers/gpu/drm/drm_probe_helper.c +++ b/drivers/gpu/drm/drm_probe_helper.c @@ -534,9 +534,6 @@ prune: if (list_empty(&connector->modes)) return 0; - list_for_each_entry(mode, &connector->modes, head) - mode->vrefresh = drm_mode_vrefresh(mode); - drm_mode_sort(&connector->modes); DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id, diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 95dd399aa9cc..8c3f5b21eff4 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -921,7 +921,8 @@ static int hdmi_mode_valid(struct drm_connector *connector, DRM_DEV_DEBUG_KMS(hdata->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n", - mode->hdisplay, mode->vdisplay, mode->vrefresh, + mode->hdisplay, mode->vdisplay, + drm_mode_vrefresh(mode), (mode->flags & DRM_MODE_FLAG_INTERLACE) ? true : false, mode->clock * 1000); @@ -1020,7 +1021,7 @@ static bool hdmi_mode_fixup(struct drm_encoder *encoder, DRM_DEV_DEBUG_KMS(dev->dev, "Adjusted Mode: [%d]x[%d] [%d]Hz\n", m->hdisplay, m->vdisplay, - m->vrefresh); + drm_mode_vrefresh(m)); drm_mode_copy(adjusted_mode, m); break; diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 21b726baedea..72f890529c12 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -1046,7 +1046,7 @@ static int mixer_mode_valid(struct exynos_drm_crtc *crtc, u32 w = mode->hdisplay, h = mode->vdisplay; DRM_DEV_DEBUG_KMS(ctx->dev, "xres=%d, yres=%d, refresh=%d, intl=%d\n", - w, h, mode->vrefresh, + w, h, drm_mode_vrefresh(mode), !!(mode->flags & DRM_MODE_FLAG_INTERLACE)); if (ctx->mxr_ver == MXR_VER_128_0_0_184) diff --git a/drivers/gpu/drm/i2c/ch7006_mode.c b/drivers/gpu/drm/i2c/ch7006_mode.c index bb5f67f10edb..6afe6d0ee630 100644 --- a/drivers/gpu/drm/i2c/ch7006_mode.c +++ b/drivers/gpu/drm/i2c/ch7006_mode.c @@ -121,7 +121,6 @@ const struct ch7006_tv_norm_info ch7006_tv_norms[] = { .vscan = 0, \ .flags = DRM_MODE_FLAG_##hsynp##HSYNC | \ DRM_MODE_FLAG_##vsynp##VSYNC, \ - .vrefresh = 0, \ }, \ .enc_hdisp = e_hd, \ .enc_vdisp = e_vd, \ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ec7e943fd877..a9a5e619fda8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8891,7 +8891,6 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode, mode->clock = pipe_config->hw.adjusted_mode.crtc_clock; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_set_name(mode); } diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index bdeea2e02642..bbf92ae69407 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -1098,10 +1098,10 @@ static void drrs_status_per_crtc(struct seq_file *m, seq_puts(m, "\n\t\t"); if (drrs->refresh_rate_type == DRRS_HIGH_RR) { seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n"); - vrefresh = panel->fixed_mode->vrefresh; + vrefresh = drm_mode_vrefresh(panel->fixed_mode); } else if (drrs->refresh_rate_type == DRRS_LOW_RR) { seq_puts(m, "DRRS_State: DRRS_LOW_RR\n"); - vrefresh = panel->downclock_mode->vrefresh; + vrefresh = drm_mode_vrefresh(panel->downclock_mode); } else { seq_printf(m, "DRRS_State: Unknown(%d)\n", drrs->refresh_rate_type); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d5aa85e57514..571009f158b7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -7356,7 +7356,7 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv, return; } - if (intel_dp->attached_connector->panel.downclock_mode->vrefresh == + if (drm_mode_vrefresh(intel_dp->attached_connector->panel.downclock_mode) == refresh_rate) index = DRRS_LOW_RR; @@ -7469,7 +7469,7 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp, if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) intel_dp_set_drrs_state(dev_priv, old_crtc_state, - intel_dp->attached_connector->panel.fixed_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode)); dev_priv->drrs.dp = NULL; mutex_unlock(&dev_priv->drrs.mutex); @@ -7502,7 +7502,7 @@ static void intel_edp_drrs_downclock_work(struct work_struct *work) struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc; intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, - intel_dp->attached_connector->panel.downclock_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.downclock_mode)); } unlock: @@ -7548,7 +7548,7 @@ void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv, /* invalidate means busy screen hence upclock */ if (frontbuffer_bits && dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, - intel_dp->attached_connector->panel.fixed_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode)); mutex_unlock(&dev_priv->drrs.mutex); } @@ -7594,7 +7594,7 @@ void intel_edp_drrs_flush(struct drm_i915_private *dev_priv, /* flush means busy screen hence upclock */ if (frontbuffer_bits && dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, - intel_dp->attached_connector->panel.fixed_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode)); /* * flush also means no more activity hence schedule downclock, if all diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c index d2e3a3a323e9..193067fd1b2b 100644 --- a/drivers/gpu/drm/i915/display/intel_tv.c +++ b/drivers/gpu/drm/i915/display/intel_tv.c @@ -1036,9 +1036,6 @@ intel_tv_mode_to_mode(struct drm_display_mode *mode, /* TV has it's own notion of sync and other mode flags, so clear them. */ mode->flags = 0; - mode->vrefresh = 0; - mode->vrefresh = drm_mode_vrefresh(mode); - snprintf(mode->name, sizeof(mode->name), "%dx%d%c (%s)", mode->hdisplay, mode->vdisplay, diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c index f303369305a3..ed28eaa42251 100644 --- a/drivers/gpu/drm/mcde/mcde_dsi.c +++ b/drivers/gpu/drm/mcde/mcde_dsi.c @@ -538,7 +538,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, */ /* (ps/s) / (pixels/s) = ps/pixels */ pclk = DIV_ROUND_UP_ULL(1000000000000, - (mode->vrefresh * mode->htotal * mode->vtotal)); + (drm_mode_vrefresh(mode) * mode->htotal * mode->vtotal)); dev_dbg(d->dev, "picoseconds between two pixels: %llu\n", pclk); @@ -568,7 +568,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, bpl *= d->mdsi->lanes; dev_dbg(d->dev, "calculated bytes per line: %llu @ %d Hz with HS %lu Hz\n", - bpl, mode->vrefresh, d->mdsi->hs_rate); + bpl, drm_mode_vrefresh(mode), d->mdsi->hs_rate); /* * 6 is header + checksum, header = 4 bytes, checksum = 2 bytes @@ -644,7 +644,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, dev_err(d->dev, "video block does not fit on line!\n"); dev_err(d->dev, "calculated bytes per line: %llu @ %d Hz\n", - bpl, mode->vrefresh); + bpl, drm_mode_vrefresh(mode)); dev_err(d->dev, "bytes per line (blkline_pck) %u bytes\n", blkline_pck); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index fe85e487e477..a7dba4ced902 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -164,7 +164,7 @@ static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) state->pending_width = crtc->mode.hdisplay; state->pending_height = crtc->mode.vdisplay; - state->pending_vrefresh = crtc->mode.vrefresh; + state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode); wmb(); /* Make sure the above parameters are set before update */ state->pending_config = true; } @@ -263,7 +263,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) width = crtc->state->adjusted_mode.hdisplay; height = crtc->state->adjusted_mode.vdisplay; - vrefresh = crtc->state->adjusted_mode.vrefresh; + vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode); drm_for_each_encoder(encoder, crtc->dev) { if (encoder->crtc != crtc) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c index ff43a3d80410..86cf19f5c9ca 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c @@ -1258,7 +1258,7 @@ static int mtk_hdmi_conn_mode_valid(struct drm_connector *conn, struct drm_bridge *next_bridge; dev_dbg(hdmi->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n", - mode->hdisplay, mode->vdisplay, mode->vrefresh, + mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode), !!(mode->flags & DRM_MODE_FLAG_INTERLACE), mode->clock * 1000); next_bridge = drm_bridge_get_next_bridge(&hdmi->bridge); diff --git a/drivers/gpu/drm/meson/meson_venc_cvbs.c b/drivers/gpu/drm/meson/meson_venc_cvbs.c index 541f9eb2a135..f1747fde1fe0 100644 --- a/drivers/gpu/drm/meson/meson_venc_cvbs.c +++ b/drivers/gpu/drm/meson/meson_venc_cvbs.c @@ -48,7 +48,6 @@ struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, }, @@ -58,7 +57,6 @@ struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, }, diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 9a9a7f5003d3..ac80b1ac459c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -59,7 +59,6 @@ nouveau_conn_native_mode(struct drm_connector *connector) int high_w = 0, high_h = 0, high_v = 0; list_for_each_entry(mode, &connector->probed_modes, head) { - mode->vrefresh = drm_mode_vrefresh(mode); if (helper->mode_valid(connector, mode) != MODE_OK || (mode->flags & DRM_MODE_FLAG_INTERLACE)) continue; @@ -80,12 +79,12 @@ nouveau_conn_native_mode(struct drm_connector *connector) continue; if (mode->hdisplay == high_w && mode->vdisplay == high_h && - mode->vrefresh < high_v) + drm_mode_vrefresh(mode) < high_v) continue; high_w = mode->hdisplay; high_h = mode->vdisplay; - high_v = mode->vrefresh; + high_v = drm_mode_vrefresh(mode); largest = mode; } diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c index 41444a73c980..47b37fef7ee8 100644 --- a/drivers/gpu/drm/panel/panel-arm-versatile.c +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c @@ -143,7 +143,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 240 + 5, .vsync_end = 240 + 5 + 6, .vtotal = 240 + 5 + 6 + 5, - .vrefresh = 116, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, }, @@ -167,7 +166,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 480 + 11, .vsync_end = 480 + 11 + 2, .vtotal = 480 + 11 + 2 + 32, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, }, @@ -190,7 +188,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 220 + 0, .vsync_end = 220 + 0 + 2, .vtotal = 220 + 0 + 2 + 1, - .vrefresh = 390, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, @@ -214,7 +211,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 320 + 2, .vsync_end = 320 + 2 + 2, .vtotal = 320 + 2 + 2 + 2, - .vrefresh = 116, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, diff --git a/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c index 39e0f0373f3c..9a5b7644d756 100644 --- a/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c +++ b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c @@ -183,7 +183,6 @@ static const struct drm_display_mode tm5p5_nt35596_mode = { .vsync_start = 1920 + 4, .vsync_end = 1920 + 4 + 2, .vtotal = 1920 + 4 + 2 + 4, - .vrefresh = 60, .width_mm = 68, .height_mm = 121, }; diff --git a/drivers/gpu/drm/panel/panel-boe-himax8279d.c b/drivers/gpu/drm/panel/panel-boe-himax8279d.c index 74d58ee7d04c..7c27bd5e3486 100644 --- a/drivers/gpu/drm/panel/panel-boe-himax8279d.c +++ b/drivers/gpu/drm/panel/panel-boe-himax8279d.c @@ -229,7 +229,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { DRM_DEV_ERROR(pinfo->base.dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); return -ENOMEM; } @@ -262,7 +262,6 @@ static const struct drm_display_mode default_display_mode = { .vsync_start = 1920 + 10, .vsync_end = 1920 + 10 + 14, .vtotal = 1920 + 10 + 14 + 4, - .vrefresh = 60, }; /* 8 inch */ diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 46fe1805c588..db5b866357f2 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -594,7 +594,6 @@ static const struct drm_display_mode boe_tv101wum_nl6_default_mode = { .vsync_start = 1920 + 10, .vsync_end = 1920 + 10 + 14, .vtotal = 1920 + 10 + 14 + 4, - .vrefresh = 60, }; static const struct panel_desc boe_tv101wum_nl6_desc = { @@ -622,7 +621,6 @@ static const struct drm_display_mode auo_kd101n80_45na_default_mode = { .vsync_start = 1920 + 16, .vsync_end = 1920 + 16 + 4, .vtotal = 1920 + 16 + 4 + 16, - .vrefresh = 60, }; static const struct panel_desc auo_kd101n80_45na_desc = { @@ -650,7 +648,6 @@ static const struct drm_display_mode boe_tv101wum_n53_default_mode = { .vsync_start = 1920 + 20, .vsync_end = 1920 + 20 + 4, .vtotal = 1920 + 20 + 4 + 10, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; @@ -678,7 +675,6 @@ static const struct drm_display_mode auo_b101uan08_3_default_mode = { .vsync_start = 1920 + 34, .vsync_end = 1920 + 34 + 2, .vtotal = 1920 + 34 + 2 + 24, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; @@ -706,7 +702,6 @@ static const struct drm_display_mode boe_tv105wum_nw0_default_mode = { .vsync_start = 1920 + 20, .vsync_end = 1920 + 20 + 4, .vtotal = 1920 + 20 + 4 + 10, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; @@ -734,7 +729,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-elida-kd35t133.c b/drivers/gpu/drm/panel/panel-elida-kd35t133.c index 711ded453c44..2338d22e23b1 100644 --- a/drivers/gpu/drm/panel/panel-elida-kd35t133.c +++ b/drivers/gpu/drm/panel/panel-elida-kd35t133.c @@ -197,7 +197,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 480 + 2, .vsync_end = 480 + 2 + 1, .vtotal = 480 + 2 + 1 + 2, - .vrefresh = 60, .clock = 17000, .width_mm = 42, .height_mm = 82, @@ -213,7 +212,7 @@ static int kd35t133_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c index fddbfddf6566..54610651ecdb 100644 --- a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c +++ b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c @@ -392,7 +392,6 @@ static int k101_im2ba02_unprepare(struct drm_panel *panel) static const struct drm_display_mode k101_im2ba02_default_mode = { .clock = 70000, - .vrefresh = 60, .hdisplay = 800, .hsync_start = 800 + 20, @@ -420,7 +419,7 @@ static int k101_im2ba02_get_modes(struct drm_panel *panel, DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", k101_im2ba02_default_mode.hdisplay, k101_im2ba02_default_mode.vdisplay, - k101_im2ba02_default_mode.vrefresh); + drm_mode_vrefresh(&k101_im2ba02_default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c index 95b789ab9d29..19a6274b10f5 100644 --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c @@ -153,7 +153,6 @@ static const struct drm_display_mode feiyang_default_mode = { .vsync_start = 600 + 12, .vsync_end = 600 + 12 + 2, .vtotal = 600 + 12 + 2 + 21, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; @@ -169,7 +168,7 @@ static int feiyang_get_modes(struct drm_panel *panel, DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", feiyang_default_mode.hdisplay, feiyang_default_mode.vdisplay, - feiyang_default_mode.vrefresh); + drm_mode_vrefresh(&feiyang_default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c index 873b1c7059bd..67a64d1999f6 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c @@ -549,7 +549,6 @@ static const struct drm_display_mode srgb_320x240_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 1, .vtotal = 262, - .vrefresh = 60, .flags = 0, }; @@ -563,7 +562,6 @@ static const struct drm_display_mode srgb_360x240_mode = { .vsync_start = 240 + 21, .vsync_end = 240 + 21 + 1, .vtotal = 262, - .vrefresh = 60, .flags = 0, }; @@ -578,7 +576,6 @@ static const struct drm_display_mode prgb_320x240_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 1, .vtotal = 262, - .vrefresh = 60, .flags = 0, }; @@ -593,7 +590,6 @@ static const struct drm_display_mode yuv_640x320_mode = { .vsync_start = 320 + 4, .vsync_end = 320 + 4 + 1, .vtotal = 320 + 4 + 1 + 18, - .vrefresh = 60, .flags = 0, }; @@ -607,7 +603,6 @@ static const struct drm_display_mode yuv_720x360_mode = { .vsync_start = 360 + 4, .vsync_end = 360 + 4 + 1, .vtotal = 360 + 4 + 1 + 18, - .vrefresh = 60, .flags = 0, }; @@ -622,7 +617,6 @@ static const struct drm_display_mode itu_r_bt_656_640_mode = { .vsync_start = 480 + 4, .vsync_end = 480 + 4 + 1, .vtotal = 500, - .vrefresh = 60, .flags = 0, }; @@ -637,7 +631,6 @@ static const struct drm_display_mode itu_r_bt_656_720_mode = { .vsync_start = 480 + 4, .vsync_end = 480 + 4 + 1, .vtotal = 500, - .vrefresh = 60, .flags = 0, }; diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c index f54077c216a3..3ed8635a6fbd 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -370,7 +370,6 @@ static int ili9881c_unprepare(struct drm_panel *panel) static const struct drm_display_mode bananapi_default_mode = { .clock = 62000, - .vrefresh = 60, .hdisplay = 720, .hsync_start = 720 + 10, @@ -394,7 +393,7 @@ static int ili9881c_get_modes(struct drm_panel *panel, dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", bananapi_default_mode.hdisplay, bananapi_default_mode.vdisplay, - bananapi_default_mode.vrefresh); + drm_mode_vrefresh(&bananapi_default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c b/drivers/gpu/drm/panel/panel-innolux-p079zca.c index 7419f1f0acee..fdf030f4cf92 100644 --- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c +++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c @@ -223,7 +223,6 @@ static const struct drm_display_mode innolux_p079zca_mode = { .vsync_start = 1024 + 20, .vsync_end = 1024 + 20 + 4, .vtotal = 1024 + 20 + 4 + 20, - .vrefresh = 60, }; static const struct panel_desc innolux_p079zca_panel_desc = { @@ -257,7 +256,6 @@ static const struct drm_display_mode innolux_p097pfg_mode = { .vsync_start = 2048 + 100, .vsync_end = 2048 + 100 + 2, .vtotal = 2048 + 100 + 2 + 18, - .vrefresh = 60, }; /* @@ -401,7 +399,7 @@ static int innolux_panel_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c index 4bfd8c877c8e..1e3fd6633981 100644 --- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c +++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c @@ -296,7 +296,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1920 + 3, .vsync_end = 1920 + 3 + 5, .vtotal = 1920 + 3 + 5 + 6, - .vrefresh = 60, .flags = 0, }; @@ -311,7 +310,7 @@ static int jdi_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c index bac1a2a06c92..0d397af23afe 100644 --- a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c +++ b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c @@ -318,7 +318,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 2048 + 95, .vsync_end = 2048 + 95 + 2, .vtotal = 2048 + 95 + 2 + 23, - .vrefresh = 60, }; static int kingdisplay_panel_get_modes(struct drm_panel *panel, @@ -330,7 +329,7 @@ static int kingdisplay_panel_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c index 113ab9c0396b..0f6a248c47a5 100644 --- a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c +++ b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c @@ -376,7 +376,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1280 + 30, .vsync_end = 1280 + 30 + 4, .vtotal = 1280 + 30 + 4 + 12, - .vrefresh = 60, .clock = 69217, .width_mm = 62, .height_mm = 110, @@ -392,7 +391,7 @@ static int ltk500hd1829_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(ctx->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-lg-lb035q02.c b/drivers/gpu/drm/panel/panel-lg-lb035q02.c index e90efeaba4ad..14456b9cd5c0 100644 --- a/drivers/gpu/drm/panel/panel-lg-lb035q02.c +++ b/drivers/gpu/drm/panel/panel-lg-lb035q02.c @@ -134,7 +134,6 @@ static const struct drm_display_mode lb035q02_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 2, .vtotal = 240 + 4 + 2 + 18, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 70, diff --git a/drivers/gpu/drm/panel/panel-lg-lg4573.c b/drivers/gpu/drm/panel/panel-lg-lg4573.c index 5907f2503755..aedc485d0727 100644 --- a/drivers/gpu/drm/panel/panel-lg-lg4573.c +++ b/drivers/gpu/drm/panel/panel-lg-lg4573.c @@ -206,7 +206,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 800 + 15, .vsync_end = 800 + 15 + 15, .vtotal = 800 + 15 + 15 + 15, - .vrefresh = 60, }; static int lg4573_get_modes(struct drm_panel *panel, @@ -218,7 +217,7 @@ static int lg4573_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c index c4f83f6384e1..f894971c1c7c 100644 --- a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c +++ b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c @@ -116,7 +116,6 @@ static const struct drm_display_mode nl8048_mode = { .vsync_start = 480 + 3, .vsync_end = 480 + 3 + 1, .vtotal = 480 + 3 + 1 + 4, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 89, diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c b/drivers/gpu/drm/panel/panel-novatek-nt35510.c index 4a8fa908a2cf..e98d54df00e7 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c @@ -1028,7 +1028,6 @@ static const struct nt35510_config nt35510_hydis_hva40wv1 = { .vsync_start = 800 + 2, /* VFP = 2 */ .vsync_end = 800 + 2 + 0, /* VSync = 0 */ .vtotal = 800 + 2 + 0 + 5, /* VBP = 5 */ - .vrefresh = 60, /* Calculated */ .flags = 0, }, /* 0x09: AVDD = 5.6V */ diff --git a/drivers/gpu/drm/panel/panel-novatek-nt39016.c b/drivers/gpu/drm/panel/panel-novatek-nt39016.c index 05cae8d62d56..79be3dc4e817 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt39016.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt39016.c @@ -335,7 +335,6 @@ static const struct drm_display_mode kd035g6_display_modes[] = { .vsync_start = 240 + 5, .vsync_end = 240 + 5 + 1, .vtotal = 240 + 5 + 1 + 4, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }, { /* 50 Hz */ @@ -348,7 +347,6 @@ static const struct drm_display_mode kd035g6_display_modes[] = { .vsync_start = 240 + 5, .vsync_end = 240 + 5 + 1, .vtotal = 240 + 5 + 1 + 4, - .vrefresh = 50, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }, }; diff --git a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c index 09deb99981a4..ecd76b5391d3 100644 --- a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c +++ b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c @@ -170,7 +170,6 @@ static int lcd_olinuxino_get_modes(struct drm_panel *panel, lcd_mode->vpw; mode->vtotal = lcd_mode->vactive + lcd_mode->vfp + lcd_mode->vpw + lcd_mode->vbp; - mode->vrefresh = lcd_mode->refresh; /* Always make the first mode preferred */ if (i == 0) diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c index bb0c992171e8..895ee3d1371e 100644 --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c @@ -81,7 +81,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 800 + 15, .vsync_end = 800 + 15 + 10, .vtotal = 800 + 15 + 10 + 14, - .vrefresh = 50, .flags = 0, .width_mm = 52, .height_mm = 86, @@ -358,7 +357,7 @@ static int otm8009a_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c index 3a0229d60095..11b3d01aca56 100644 --- a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c +++ b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c @@ -102,7 +102,6 @@ static const struct drm_display_mode default_mode_osd101t2587 = { .vsync_start = 1200 + 24, .vsync_end = 1200 + 24 + 6, .vtotal = 1200 + 24 + 6 + 48, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -117,7 +116,7 @@ static int osd101t2587_panel_get_modes(struct drm_panel *panel, dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", osd101t2587->default_mode->hdisplay, osd101t2587->default_mode->vdisplay, - osd101t2587->default_mode->vrefresh); + drm_mode_vrefresh(osd101t2587->default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c index 69693451462e..627dfcf8adb4 100644 --- a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c +++ b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c @@ -149,7 +149,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1200 + 24, .vsync_end = 1200 + 24 + 6, .vtotal = 1200 + 24 + 6 + 48, - .vrefresh = 60, }; static int wuxga_nt_panel_get_modes(struct drm_panel *panel, @@ -161,7 +160,7 @@ static int wuxga_nt_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c index 8f078b7dd89e..e50ee26474cf 100644 --- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c +++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c @@ -209,7 +209,6 @@ static const struct drm_display_mode rpi_touchscreen_modes[] = { .vsync_start = 480 + 7, .vsync_end = 480 + 7 + 2, .vtotal = 480 + 7 + 2 + 21, - .vrefresh = 60, }, }; @@ -322,7 +321,8 @@ static int rpi_touchscreen_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, + drm_mode_vrefresh(m)); continue; } diff --git a/drivers/gpu/drm/panel/panel-raydium-rm67191.c b/drivers/gpu/drm/panel/panel-raydium-rm67191.c index 313637d53d28..d001c52e0ca9 100644 --- a/drivers/gpu/drm/panel/panel-raydium-rm67191.c +++ b/drivers/gpu/drm/panel/panel-raydium-rm67191.c @@ -218,7 +218,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1920 + 10, .vsync_end = 1920 + 10 + 2, .vtotal = 1920 + 10 + 2 + 4, - .vrefresh = 60, .width_mm = 68, .height_mm = 121, .flags = DRM_MODE_FLAG_NHSYNC | @@ -445,7 +444,7 @@ static int rad_panel_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c index e8982948e0ea..81ae8be62d15 100644 --- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c +++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c @@ -92,7 +92,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1280 + 12, .vsync_end = 1280 + 12 + 4, .vtotal = 1280 + 12 + 4 + 12, - .vrefresh = 50, .flags = 0, .width_mm = 68, .height_mm = 122, @@ -339,7 +338,7 @@ static int rm68200_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c index 38ff742bc120..da4e373291f9 100644 --- a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c +++ b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c @@ -223,7 +223,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1440 + 20, .vsync_end = 1440 + 20 + 4, .vtotal = 1440 + 20 + 4 + 12, - .vrefresh = 60, .clock = 75276, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 65, @@ -240,7 +239,7 @@ static int jh057n_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } @@ -360,7 +359,7 @@ static int jh057n_probe(struct mipi_dsi_device *dsi) DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh, + drm_mode_vrefresh(&default_mode), mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); jh057n_debugfs_init(ctx); diff --git a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c index ef18559e237e..a7b0b3e39e1a 100644 --- a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c +++ b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c @@ -103,7 +103,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 600 + 12, .vsync_end = 600 + 12 + 10, .vtotal = 600 + 12 + 10 + 13, - .vrefresh = 60, .width_mm = 154, .height_mm = 85, diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c index 2150043dcf6b..f02645d396ac 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c @@ -37,12 +37,6 @@ static const struct drm_display_mode samsung_s6d16d0_mode = { .vsync_start = 480 + 1, .vsync_end = 480 + 1 + 1, .vtotal = 480 + 1 + 1 + 1, - /* - * This depends on the clocking HS vs LP rate, this value - * is calculated as: - * vrefresh = (clock * 1000) / (htotal*vtotal) - */ - .vrefresh = 816, .width_mm = 84, .height_mm = 48, }; diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c index 36ebd5a4ac7b..80ef122e7466 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c @@ -617,7 +617,6 @@ static const struct drm_display_mode s6e3ha2_mode = { .vsync_start = 2560 + 1, .vsync_end = 2560 + 1 + 1, .vtotal = 2560 + 1 + 1 + 15, - .vrefresh = 60, .flags = 0, }; @@ -636,7 +635,6 @@ static const struct drm_display_mode s6e3hf2_mode = { .vsync_start = 2560 + 1, .vsync_end = 2560 + 1 + 1, .vtotal = 2560 + 1 + 1 + 15, - .vrefresh = 60, .flags = 0, }; @@ -655,7 +653,7 @@ static int s6e3ha2_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, - ctx->desc->mode->vrefresh); + drm_mode_vrefresh(ctx->desc->mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c index a3570e0a90a8..1247656d73bf 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c @@ -52,7 +52,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 320 + 150, .vsync_end = 320 + 150 + 1, .vtotal = 320 + 150 + 1 + 2, - .vrefresh = 30, .flags = 0, }; @@ -409,7 +408,7 @@ static int s6e63j0x03_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c index a5f76eb4fa25..64421347bfd4 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c @@ -117,7 +117,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 800 + 28, .vsync_end = 800 + 28 + 2, .vtotal = 800 + 28 + 2 + 1, - .vrefresh = 60, .width_mm = 53, .height_mm = 89, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, @@ -371,7 +370,7 @@ static int s6e63m0_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c index 9d843fcc3a22..485eabecfcc9 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c @@ -177,7 +177,6 @@ static const struct drm_display_mode s6e88a0_ams452ef01_mode = { .vsync_start = 960 + 14, .vsync_end = 960 + 14 + 2, .vtotal = 960 + 14 + 2 + 8, - .vrefresh = 60, .width_mm = 56, .height_mm = 100, }; diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c index 40fcbbbacb2c..e417dc4921c2 100644 --- a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c +++ b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c @@ -92,7 +92,8 @@ static int seiko_panel_get_fixed_modes(struct seiko_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, + drm_mode_vrefresh(m)); continue; } diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c index b5d1977221a7..f07324b705b3 100644 --- a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c +++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c @@ -269,7 +269,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1600 + 4, .vsync_end = 1600 + 4 + 8, .vtotal = 1600 + 4 + 8 + 32, - .vrefresh = 60, }; static int sharp_panel_get_modes(struct drm_panel *panel, @@ -281,7 +280,7 @@ static int sharp_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c index 1cf3f02435c1..d7bf13b9e1d6 100644 --- a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c +++ b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c @@ -93,7 +93,6 @@ static const struct drm_display_mode ls037v7dw01_mode = { .vsync_start = 640 + 1, .vsync_end = 640 + 1 + 1, .vtotal = 640 + 1 + 1 + 1, - .vrefresh = 58, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 56, diff --git a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c index ce586c6d70c7..b2e58935529c 100644 --- a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c +++ b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c @@ -201,7 +201,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 960 + 3, .vsync_end = 960 + 3 + 15, .vtotal = 960 + 3 + 15 + 1, - .vrefresh = 60, }; static int sharp_nt_panel_get_modes(struct drm_panel *panel, @@ -213,7 +212,7 @@ static int sharp_nt_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index b6ecd1552132..b067f66cea0e 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -163,7 +163,8 @@ static unsigned int panel_simple_get_display_modes(struct panel_simple *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, + drm_mode_vrefresh(m)); continue; } @@ -602,7 +603,6 @@ static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -627,7 +627,6 @@ static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = { .vsync_start = 480 + 2, .vsync_end = 480 + 2 + 45, .vtotal = 480 + 2 + 45 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -678,7 +677,6 @@ static const struct drm_display_mode auo_b101aw03_mode = { .vsync_start = 600 + 16, .vsync_end = 600 + 16 + 6, .vtotal = 600 + 16 + 6 + 16, - .vrefresh = 60, }; static const struct panel_desc auo_b101aw03 = { @@ -723,7 +721,6 @@ static const struct drm_display_mode auo_b101xtn01_mode = { .vsync_start = 768 + 14, .vsync_end = 768 + 14 + 42, .vtotal = 768 + 14 + 42, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -747,7 +744,6 @@ static const struct drm_display_mode auo_b116xak01_mode = { .vsync_start = 768 + 4, .vsync_end = 768 + 4 + 6, .vtotal = 768 + 4 + 6 + 15, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -776,7 +772,6 @@ static const struct drm_display_mode auo_b116xw03_mode = { .vsync_start = 768 + 10, .vsync_end = 768 + 10 + 12, .vtotal = 768 + 10 + 12 + 6, - .vrefresh = 60, }; static const struct panel_desc auo_b116xw03 = { @@ -799,7 +794,6 @@ static const struct drm_display_mode auo_b133xtn01_mode = { .vsync_start = 768 + 3, .vsync_end = 768 + 3 + 6, .vtotal = 768 + 3 + 6 + 13, - .vrefresh = 60, }; static const struct panel_desc auo_b133xtn01 = { @@ -822,7 +816,6 @@ static const struct drm_display_mode auo_b133htn01_mode = { .vsync_start = 1080 + 25, .vsync_end = 1080 + 25 + 10, .vtotal = 1080 + 25 + 10 + 10, - .vrefresh = 60, }; static const struct panel_desc auo_b133htn01 = { @@ -878,7 +871,6 @@ static const struct drm_display_mode auo_g101evn010_mode = { .vsync_start = 800 + 8, .vsync_end = 800 + 8 + 2, .vtotal = 800 + 8 + 2 + 6, - .vrefresh = 60, }; static const struct panel_desc auo_g101evn010 = { @@ -903,7 +895,6 @@ static const struct drm_display_mode auo_g104sn02_mode = { .vsync_start = 600 + 10, .vsync_end = 600 + 10 + 35, .vtotal = 600 + 10 + 35 + 2, - .vrefresh = 60, }; static const struct panel_desc auo_g104sn02 = { @@ -926,7 +917,6 @@ static const struct drm_display_mode auo_g121ean01_mode = { .vsync_start = 800 + 6, .vsync_end = 800 + 6 + 4, .vtotal = 800 + 6 + 4 + 10, - .vrefresh = 60, }; static const struct panel_desc auo_g121ean01 = { @@ -981,7 +971,6 @@ static const struct drm_display_mode auo_g156xtn01_mode = { .vsync_start = 768 + 4, .vsync_end = 768 + 4 + 4, .vtotal = 806, - .vrefresh = 60, }; static const struct panel_desc auo_g156xtn01 = { @@ -1095,7 +1084,6 @@ static const struct drm_display_mode auo_t215hvn01_mode = { .vsync_start = 1080 + 4, .vsync_end = 1080 + 4 + 5, .vtotal = 1080 + 4 + 5 + 36, - .vrefresh = 60, }; static const struct panel_desc auo_t215hvn01 = { @@ -1122,7 +1110,6 @@ static const struct drm_display_mode avic_tm070ddh03_mode = { .vsync_start = 600 + 17, .vsync_end = 600 + 17 + 1, .vtotal = 600 + 17 + 1 + 17, - .vrefresh = 60, }; static const struct panel_desc avic_tm070ddh03 = { @@ -1172,7 +1159,6 @@ static const struct drm_display_mode boe_hv070wsa_mode = { .vsync_start = 600 + 10, .vsync_end = 600 + 10 + 10, .vtotal = 600 + 10 + 10 + 10, - .vrefresh = 60, }; static const struct panel_desc boe_hv070wsa = { @@ -1195,7 +1181,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { .vsync_start = 800 + 3, .vsync_end = 800 + 3 + 5, .vtotal = 800 + 3 + 5 + 24, - .vrefresh = 60, }, { .clock = 57500, @@ -1207,7 +1192,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { .vsync_start = 800 + 3, .vsync_end = 800 + 3 + 5, .vtotal = 800 + 3 + 5 + 24, - .vrefresh = 48, }, }; @@ -1237,7 +1221,6 @@ static const struct drm_display_mode boe_nv133fhm_n61_modes = { .vsync_start = 1080 + 3, .vsync_end = 1080 + 3 + 6, .vtotal = 1080 + 3 + 6 + 31, - .vrefresh = 60, }; /* Also used for boe_nv133fhm_n62 */ @@ -1269,7 +1252,6 @@ static const struct drm_display_mode boe_nv140fhmn49_modes[] = { .vsync_start = 1080 + 3, .vsync_end = 1080 + 3 + 5, .vtotal = 1125, - .vrefresh = 60, }, }; @@ -1300,7 +1282,6 @@ static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { .vsync_start = 272 + 8, .vsync_end = 272 + 8 + 8, .vtotal = 272 + 8 + 8 + 8, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1325,7 +1306,6 @@ static const struct drm_display_mode cdtech_s070wv95_ct16_mode = { .vsync_start = 480 + 29, .vsync_end = 480 + 29 + 13, .vtotal = 480 + 29 + 13 + 3, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1349,7 +1329,6 @@ static const struct drm_display_mode chunghwa_claa070wp03xg_mode = { .vsync_start = 1280 + 1, .vsync_end = 1280 + 1 + 7, .vtotal = 1280 + 1 + 7 + 15, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1373,7 +1352,6 @@ static const struct drm_display_mode chunghwa_claa101wa01a_mode = { .vsync_start = 768 + 4, .vsync_end = 768 + 4 + 4, .vtotal = 768 + 4 + 4 + 4, - .vrefresh = 60, }; static const struct panel_desc chunghwa_claa101wa01a = { @@ -1396,7 +1374,6 @@ static const struct drm_display_mode chunghwa_claa101wb01_mode = { .vsync_start = 768 + 16, .vsync_end = 768 + 16 + 8, .vtotal = 768 + 16 + 8 + 16, - .vrefresh = 60, }; static const struct panel_desc chunghwa_claa101wb01 = { @@ -1419,7 +1396,6 @@ static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 2, .vtotal = 480 + 10 + 2 + 33, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1506,7 +1482,6 @@ static const struct drm_display_mode edt_et035012dm6_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 4, .vtotal = 240 + 4 + 4 + 14, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1538,7 +1513,6 @@ static const struct drm_display_mode edt_etm043080dh6gp_mode = { .vsync_start = 288 + 2, .vsync_end = 288 + 2 + 4, .vtotal = 288 + 2 + 4 + 10, - .vrefresh = 60, }; static const struct panel_desc edt_etm043080dh6gp = { @@ -1563,7 +1537,6 @@ static const struct drm_display_mode edt_etm0430g0dh6_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1587,7 +1560,6 @@ static const struct drm_display_mode edt_et057090dhu_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 3, .vtotal = 480 + 10 + 3 + 32, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1613,7 +1585,6 @@ static const struct drm_display_mode edt_etm0700g0dh6_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 2, .vtotal = 480 + 10 + 2 + 33, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1678,7 +1649,6 @@ static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = { .vsync_start = 480 + 37, .vsync_end = 480 + 37 + 2, .vtotal = 480 + 37 + 2 + 8, - .vrefresh = 60, }; static const struct panel_desc foxlink_fl500wvr00_a0t = { @@ -1702,7 +1672,6 @@ static const struct drm_display_mode frida_frd350h54004_mode = { .vsync_start = 240 + 2, .vsync_end = 240 + 2 + 6, .vtotal = 240 + 2 + 6 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -1729,7 +1698,6 @@ static const struct drm_display_mode friendlyarm_hd702e_mode = { .vsync_start = 1280 + 4, .vsync_end = 1280 + 4 + 8, .vtotal = 1280 + 4 + 8 + 4, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1752,7 +1720,6 @@ static const struct drm_display_mode giantplus_gpg482739qs5_mode = { .vsync_start = 272 + 8, .vsync_end = 272 + 8 + 1, .vtotal = 272 + 8 + 1 + 8, - .vrefresh = 60, }; static const struct panel_desc giantplus_gpg482739qs5 = { @@ -1856,7 +1823,6 @@ static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = { .vsync_start = 480 + 16, .vsync_end = 480 + 16 + 13, .vtotal = 480 + 16 + 13 + 16, - .vrefresh = 60, }; static const struct panel_desc hitachi_tx23d38vm0caa = { @@ -1883,7 +1849,6 @@ static const struct drm_display_mode innolux_at043tn24_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1909,7 +1874,6 @@ static const struct drm_display_mode innolux_at070tn92_mode = { .vsync_start = 480 + 22, .vsync_end = 480 + 22 + 10, .vtotal = 480 + 22 + 23 + 10, - .vrefresh = 60, }; static const struct panel_desc innolux_at070tn92 = { @@ -2020,7 +1984,6 @@ static const struct drm_display_mode innolux_g121x1_l03_mode = { .vsync_start = 768 + 38, .vsync_end = 768 + 38 + 1, .vtotal = 768 + 38 + 1 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -2082,7 +2045,6 @@ static const struct drm_display_mode innolux_n156bge_l21_mode = { .vsync_start = 768 + 2, .vsync_end = 768 + 2 + 6, .vtotal = 768 + 2 + 6 + 12, - .vrefresh = 60, }; static const struct panel_desc innolux_n156bge_l21 = { @@ -2105,7 +2067,6 @@ static const struct drm_display_mode innolux_p120zdg_bf1_mode = { .vsync_start = 1440 + 3, .vsync_end = 1440 + 3 + 10, .vtotal = 1440 + 3 + 10 + 27, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -2133,7 +2094,6 @@ static const struct drm_display_mode innolux_zj070na_01p_mode = { .vsync_start = 600 + 16, .vsync_end = 600 + 16 + 4, .vtotal = 600 + 16 + 4 + 16, - .vrefresh = 60, }; static const struct panel_desc innolux_zj070na_01p = { @@ -2156,7 +2116,6 @@ static const struct drm_display_mode ivo_m133nwf4_r0_mode = { .vsync_start = 1080 + 3, .vsync_end = 1080 + 3 + 12, .vtotal = 1080 + 3 + 12 + 17, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -2260,7 +2219,6 @@ static const struct drm_display_mode lemaker_bl035_rgb_002_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 3, .vtotal = 240 + 4 + 3 + 15, - .vrefresh = 60, }; static const struct panel_desc lemaker_bl035_rgb_002 = { @@ -2284,7 +2242,6 @@ static const struct drm_display_mode lg_lb070wv8_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 25, .vtotal = 480 + 10 + 25 + 10, - .vrefresh = 60, }; static const struct panel_desc lg_lb070wv8 = { @@ -2309,7 +2266,6 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { .vsync_start = 2048 + 8, .vsync_end = 2048 + 8 + 4, .vtotal = 2048 + 8 + 4 + 8, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2332,7 +2288,6 @@ static const struct drm_display_mode lg_lp097qx1_spa1_mode = { .vsync_start = 1536 + 3, .vsync_end = 1536 + 3 + 1, .vtotal = 1536 + 3 + 1 + 9, - .vrefresh = 60, }; static const struct panel_desc lg_lp097qx1_spa1 = { @@ -2354,7 +2309,6 @@ static const struct drm_display_mode lg_lp120up1_mode = { .vsync_start = 1280 + 4, .vsync_end = 1280 + 4 + 4, .vtotal = 1280 + 4 + 4 + 12, - .vrefresh = 60, }; static const struct panel_desc lg_lp120up1 = { @@ -2378,7 +2332,6 @@ static const struct drm_display_mode lg_lp129qe_mode = { .vsync_start = 1700 + 3, .vsync_end = 1700 + 3 + 10, .vtotal = 1700 + 3 + 10 + 36, - .vrefresh = 60, }; static const struct panel_desc lg_lp129qe = { @@ -2459,7 +2412,6 @@ static const struct drm_display_mode mitsubishi_aa070mc01_mode = { .vsync_start = 480 + 0, .vsync_end = 480 + 48 + 1, .vtotal = 480 + 48 + 1 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -2474,7 +2426,6 @@ static const struct drm_display_mode logicpd_type_28_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 11, .vtotal = 272 + 2 + 11 + 3, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -2554,7 +2505,6 @@ static const struct drm_display_mode nec_nl4827hc19_05b_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 4, .vtotal = 272 + 2 + 4 + 2, - .vrefresh = 74, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2580,7 +2530,6 @@ static const struct drm_display_mode netron_dy_e231732_mode = { .vsync_start = 600 + 127, .vsync_end = 600 + 127 + 20, .vtotal = 600 + 127 + 20 + 3, - .vrefresh = 60, }; static const struct panel_desc netron_dy_e231732 = { @@ -2604,7 +2553,6 @@ static const struct drm_display_mode neweast_wjfh116008a_modes[] = { .vsync_start = 1080 + 3, .vsync_end = 1080 + 3 + 5, .vtotal = 1080 + 3 + 5 + 23, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }, { .clock = 110920, @@ -2616,7 +2564,6 @@ static const struct drm_display_mode neweast_wjfh116008a_modes[] = { .vsync_start = 1080 + 3, .vsync_end = 1080 + 3 + 5, .vtotal = 1080 + 3 + 5 + 23, - .vrefresh = 48, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, } }; @@ -2648,7 +2595,6 @@ static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2756,7 +2702,6 @@ static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = { .vsync_start = 272 + 8, .vsync_end = 272 + 8 + 5, .vtotal = 272 + 8 + 5 + 3, - .vrefresh = 60, }; static const struct panel_desc olimex_lcd_olinuxino_43ts = { @@ -2784,7 +2729,6 @@ static const struct drm_display_mode ontat_yx700wv03_mode = { .vsync_start = 483, .vsync_end = 493, .vtotal = 500, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2813,7 +2757,6 @@ static const struct drm_display_mode ortustech_com37h3m_mode = { .vsync_start = 640 + 4, .vsync_end = 640 + 4 + 2, .vtotal = 640 + 4 + 2 + 4, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2840,7 +2783,6 @@ static const struct drm_display_mode ortustech_com43h4m85ulc_mode = { .vsync_start = 800 + 3, .vsync_end = 800 + 3 + 3, .vtotal = 800 + 3 + 3 + 3, - .vrefresh = 60, }; static const struct panel_desc ortustech_com43h4m85ulc = { @@ -2866,7 +2808,6 @@ static const struct drm_display_mode osddisplays_osd070t1718_19ts_mode = { .vsync_start = 480 + 22, .vsync_end = 480 + 22 + 13, .vtotal = 480 + 22 + 13 + 10, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2894,7 +2835,6 @@ static const struct drm_display_mode pda_91_00156_a0_mode = { .vsync_start = 480 + 1, .vsync_end = 480 + 1 + 23, .vtotal = 480 + 1 + 23 + 22, - .vrefresh = 60, }; static const struct panel_desc pda_91_00156_a0 = { @@ -2918,7 +2858,6 @@ static const struct drm_display_mode qd43003c0_40_mode = { .vsync_start = 272 + 4, .vsync_end = 272 + 4 + 10, .vtotal = 272 + 4 + 10 + 2, - .vrefresh = 60, }; static const struct panel_desc qd43003c0_40 = { @@ -2972,7 +2911,6 @@ static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = { .vsync_start = 800 + 2, .vsync_end = 800 + 2 + 5, .vtotal = 800 + 2 + 5 + 16, - .vrefresh = 60, }; static const struct panel_desc rocktech_rk101ii01d_ct = { @@ -3001,7 +2939,6 @@ static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { .vsync_start = 1600 + 2, .vsync_end = 1600 + 2 + 5, .vtotal = 1600 + 2 + 5 + 57, - .vrefresh = 60, }; static const struct panel_desc samsung_lsn122dl01_c01 = { @@ -3023,7 +2960,6 @@ static const struct drm_display_mode samsung_ltn101nt05_mode = { .vsync_start = 600 + 3, .vsync_end = 600 + 3 + 6, .vtotal = 600 + 3 + 6 + 61, - .vrefresh = 60, }; static const struct panel_desc samsung_ltn101nt05 = { @@ -3046,7 +2982,6 @@ static const struct drm_display_mode samsung_ltn140at29_301_mode = { .vsync_start = 768 + 2, .vsync_end = 768 + 2 + 5, .vtotal = 768 + 2 + 5 + 17, - .vrefresh = 60, }; static const struct panel_desc samsung_ltn140at29_301 = { @@ -3093,7 +3028,6 @@ static const struct drm_display_mode sharp_ld_d5116z01b_mode = { .vsync_start = 1280 + 3, .vsync_end = 1280 + 3 + 10, .vtotal = 1280 + 3 + 10 + 57, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -3119,7 +3053,6 @@ static const struct drm_display_mode sharp_lq070y3dg3b_mode = { .vsync_start = 480 + 8, .vsync_end = 480 + 8 + 2, .vtotal = 480 + 8 + 2 + 35, - .vrefresh = 60, .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE, }; @@ -3146,7 +3079,6 @@ static const struct drm_display_mode sharp_lq035q7db03_mode = { .vsync_start = 320 + 9, .vsync_end = 320 + 9 + 1, .vtotal = 320 + 9 + 1 + 7, - .vrefresh = 60, }; static const struct panel_desc sharp_lq035q7db03 = { @@ -3250,7 +3182,6 @@ static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = { .vsync_start = 480 + 1, .vsync_end = 480 + 1 + 23, .vtotal = 480 + 1 + 23 + 22, - .vrefresh = 60, }; static const struct panel_desc shelly_sca07010_bfn_lnn = { @@ -3273,7 +3204,6 @@ static const struct drm_display_mode starry_kr070pe2t_mode = { .vsync_start = 480 + 22, .vsync_end = 480 + 22 + 1, .vtotal = 480 + 22 + 1 + 22, - .vrefresh = 60, }; static const struct panel_desc starry_kr070pe2t = { @@ -3299,7 +3229,6 @@ static const struct drm_display_mode starry_kr122ea0sra_mode = { .vsync_start = 1200 + 15, .vsync_end = 1200 + 15 + 2, .vtotal = 1200 + 15 + 2 + 18, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -3327,7 +3256,6 @@ static const struct drm_display_mode tfc_s9700rtwv43tr_01b_mode = { .vsync_start = 480 + 13, .vsync_end = 480 + 13 + 2, .vtotal = 480 + 13 + 2 + 29, - .vrefresh = 62, }; static const struct panel_desc tfc_s9700rtwv43tr_01b = { @@ -3403,7 +3331,6 @@ static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = { .vsync_start = 240 + 3, .vsync_end = 240 + 3 + 1, .vtotal = 240 + 3 + 1 + 17, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }, }; @@ -3431,7 +3358,6 @@ static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = { .vsync_start = 240 + 0, .vsync_end = 240 + 0 + 1, .vtotal = 240 + 0 + 1 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, }; @@ -3460,7 +3386,6 @@ static const struct drm_display_mode toshiba_lt089ac29000_mode = { .vsync_start = 768 + 20, .vsync_end = 768 + 20 + 7, .vtotal = 768 + 20 + 7 + 3, - .vrefresh = 60, }; static const struct panel_desc toshiba_lt089ac29000 = { @@ -3485,7 +3410,6 @@ static const struct drm_display_mode tpk_f07a_0102_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 2, .vtotal = 480 + 10 + 2 + 33, - .vrefresh = 60, }; static const struct panel_desc tpk_f07a_0102 = { @@ -3508,7 +3432,6 @@ static const struct drm_display_mode tpk_f10a_0102_mode = { .vsync_start = 600 + 20, .vsync_end = 600 + 20 + 5, .vtotal = 600 + 20 + 5 + 25, - .vrefresh = 60, }; static const struct panel_desc tpk_f10a_0102 = { @@ -3567,7 +3490,6 @@ static const struct drm_display_mode vl050_8048nt_c01_mode = { .vsync_start = 480 + 22, .vsync_end = 480 + 22 + 10, .vtotal = 480 + 22 + 10 + 23, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -3593,7 +3515,6 @@ static const struct drm_display_mode winstar_wf35ltiacd_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 3, .vtotal = 240 + 4 + 3 + 15, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -3619,7 +3540,6 @@ static const struct drm_display_mode arm_rtsm_mode[] = { .vsync_start = 768 + 3, .vsync_end = 768 + 3 + 6, .vtotal = 768 + 3 + 6 + 29, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }, }; @@ -4070,7 +3990,6 @@ static const struct drm_display_mode auo_b080uan01_mode = { .vsync_start = 1920 + 9, .vsync_end = 1920 + 9 + 2, .vtotal = 1920 + 9 + 2 + 8, - .vrefresh = 60, }; static const struct panel_desc_dsi auo_b080uan01 = { @@ -4098,7 +4017,6 @@ static const struct drm_display_mode boe_tv080wum_nl0_mode = { .vsync_start = 1920 + 21, .vsync_end = 1920 + 21 + 3, .vtotal = 1920 + 21 + 3 + 18, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -4128,7 +4046,6 @@ static const struct drm_display_mode lg_ld070wx3_sl01_mode = { .vsync_start = 1280 + 28, .vsync_end = 1280 + 28 + 1, .vtotal = 1280 + 28 + 1 + 14, - .vrefresh = 60, }; static const struct panel_desc_dsi lg_ld070wx3_sl01 = { @@ -4156,7 +4073,6 @@ static const struct drm_display_mode lg_lh500wx1_sd03_mode = { .vsync_start = 1280 + 8, .vsync_end = 1280 + 8 + 4, .vtotal = 1280 + 8 + 4 + 12, - .vrefresh = 60, }; static const struct panel_desc_dsi lg_lh500wx1_sd03 = { @@ -4184,7 +4100,6 @@ static const struct drm_display_mode panasonic_vvx10f004b00_mode = { .vsync_start = 1200 + 17, .vsync_end = 1200 + 17 + 2, .vtotal = 1200 + 17 + 2 + 16, - .vrefresh = 60, }; static const struct panel_desc_dsi panasonic_vvx10f004b00 = { @@ -4213,7 +4128,6 @@ static const struct drm_display_mode lg_acx467akm_7_mode = { .vsync_start = 1920 + 2, .vsync_end = 1920 + 2 + 2, .vtotal = 1920 + 2 + 2 + 2, - .vrefresh = 60, }; static const struct panel_desc_dsi lg_acx467akm_7 = { @@ -4241,7 +4155,6 @@ static const struct drm_display_mode osd101t2045_53ts_mode = { .vsync_start = 1200 + 16, .vsync_end = 1200 + 16 + 2, .vtotal = 1200 + 16 + 2 + 16, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c index 4b4f2558e3b4..692041ae4eb6 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c @@ -272,7 +272,7 @@ static int st7701_get_modes(struct drm_panel *panel, DRM_DEV_ERROR(&st7701->dsi->dev, "failed to add mode %ux%ux@%u\n", desc_mode->hdisplay, desc_mode->vdisplay, - desc_mode->vrefresh); + drm_mode_vrefresh(desc_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index cc02c54c1b2e..3513ae40efa8 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -165,7 +165,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 320 + 8, .vsync_end = 320 + 8 + 4, .vtotal = 320 + 8 + 4 + 4, - .vrefresh = 60, }; static int st7789v_get_modes(struct drm_panel *panel, @@ -177,7 +176,7 @@ static int st7789v_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-sony-acx424akp.c b/drivers/gpu/drm/panel/panel-sony-acx424akp.c index c91e55b2d7a3..97a1b4790d3c 100644 --- a/drivers/gpu/drm/panel/panel-sony-acx424akp.c +++ b/drivers/gpu/drm/panel/panel-sony-acx424akp.c @@ -57,7 +57,6 @@ static const struct drm_display_mode sony_acx424akp_vid_mode = { .vsync_start = 864 + 14, .vsync_end = 864 + 14 + 1, .vtotal = 864 + 14 + 1 + 11, - .vrefresh = 60, .width_mm = 48, .height_mm = 84, .flags = DRM_MODE_FLAG_PVSYNC, @@ -81,7 +80,6 @@ static const struct drm_display_mode sony_acx424akp_cmd_mode = { * Some desired refresh rate, experiments at the maximum "pixel" * clock speed (HS clock 420 MHz) yields around 117Hz. */ - .vrefresh = 60, .width_mm = 48, .height_mm = 84, }; diff --git a/drivers/gpu/drm/panel/panel-sony-acx565akm.c b/drivers/gpu/drm/panel/panel-sony-acx565akm.c index 5c4b6f6e5c2d..fc6a7e451abe 100644 --- a/drivers/gpu/drm/panel/panel-sony-acx565akm.c +++ b/drivers/gpu/drm/panel/panel-sony-acx565akm.c @@ -514,7 +514,6 @@ static const struct drm_display_mode acx565akm_mode = { .vsync_start = 480 + 3, .vsync_end = 480 + 3 + 3, .vtotal = 480 + 3 + 3 + 4, - .vrefresh = 57, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 77, diff --git a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c index aeca15dfeb3c..58d683cc5215 100644 --- a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c +++ b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c @@ -281,7 +281,6 @@ static const struct drm_display_mode td028ttec1_mode = { .vsync_start = 640 + 4, .vsync_end = 640 + 4 + 2, .vtotal = 640 + 4 + 2 + 2, - .vrefresh = 66, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 43, diff --git a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c index 75f1f1f1b6de..9b2a356c4d9a 100644 --- a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c +++ b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c @@ -339,7 +339,6 @@ static const struct drm_display_mode td043mtea1_mode = { .vsync_start = 480 + 39, .vsync_end = 480 + 39 + 1, .vtotal = 480 + 39 + 1 + 34, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 94, diff --git a/drivers/gpu/drm/panel/panel-tpo-tpg110.c b/drivers/gpu/drm/panel/panel-tpo-tpg110.c index 8472d018c16f..c7a2f0ae5ba5 100644 --- a/drivers/gpu/drm/panel/panel-tpo-tpg110.c +++ b/drivers/gpu/drm/panel/panel-tpo-tpg110.c @@ -112,7 +112,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 1, .vtotal = 480 + 10 + 1 + 35, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -129,7 +128,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 480 + 18, .vsync_end = 480 + 18 + 1, .vtotal = 480 + 18 + 1 + 27, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -146,7 +144,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 1, .vtotal = 272 + 2 + 1 + 12, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -163,7 +160,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 640 + 4, .vsync_end = 640 + 4 + 1, .vtotal = 640 + 4 + 1 + 8, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -180,7 +176,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 240 + 2, .vsync_end = 240 + 2 + 1, .vtotal = 240 + 2 + 1 + 20, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, diff --git a/drivers/gpu/drm/panel/panel-truly-nt35597.c b/drivers/gpu/drm/panel/panel-truly-nt35597.c index f0ad6081570f..9b9c167b8dc8 100644 --- a/drivers/gpu/drm/panel/panel-truly-nt35597.c +++ b/drivers/gpu/drm/panel/panel-truly-nt35597.c @@ -534,7 +534,6 @@ static const struct drm_display_mode qcom_sdm845_mtp_2k_mode = { .vsync_start = 2560 + 8, .vsync_end = 2560 + 8 + 1, .vtotal = 2560 + 8 + 1 + 7, - .vrefresh = 60, .flags = 0, }; diff --git a/drivers/gpu/drm/panel/panel-visionox-rm69299.c b/drivers/gpu/drm/panel/panel-visionox-rm69299.c index 42f299ad3804..a12976b497ce 100644 --- a/drivers/gpu/drm/panel/panel-visionox-rm69299.c +++ b/drivers/gpu/drm/panel/panel-visionox-rm69299.c @@ -168,7 +168,6 @@ static const struct drm_display_mode visionox_rm69299_1080x2248_60hz = { .vsync_start = 2248 + 56, .vsync_end = 2248 + 56 + 4, .vtotal = 2248 + 56 + 4 + 4, - .vrefresh = 60, .flags = 0, }; diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c index 1645aceab597..8a3b2f906e63 100644 --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c @@ -243,7 +243,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1280 + 22, .vsync_end = 1280 + 22 + 4, .vtotal = 1280 + 22 + 4 + 11, - .vrefresh = 60, .clock = 64000, .width_mm = 68, .height_mm = 121, @@ -259,7 +258,7 @@ static int xpp055c272_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c index a1ec891eaf3a..5c2b650b561d 100644 --- a/drivers/gpu/drm/sti/sti_hda.c +++ b/drivers/gpu/drm/sti/sti_hda.c @@ -586,7 +586,6 @@ static int sti_hda_connector_get_modes(struct drm_connector *connector) &hda_supported_modes[i].mode); if (!mode) continue; - mode->vrefresh = drm_mode_vrefresh(mode); /* the first mode is the preferred mode */ if (i == 0) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 04d66592f605..3c97654b5a43 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c @@ -2138,7 +2138,6 @@ void vmw_guess_mode_timing(struct drm_display_mode *mode) mode->vtotal = mode->vsync_end + 50; mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; - mode->vrefresh = drm_mode_vrefresh(mode); } @@ -2212,7 +2211,6 @@ int vmw_du_connector_fill_modes(struct drm_connector *connector, mode = drm_mode_duplicate(dev, bmode); if (!mode) return 0; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_probed_add(connector, mode); } |