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| author | Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> | 2019-09-09 13:00:35 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-09-09 19:11:51 +0200 |
| commit | 212fbf2c9e84ceb267cadd8342156b69b54b8135 (patch) | |
| tree | c63ec41a62d4760a89755630f5ac268b6f6c572b /drivers | |
| parent | irqchip/al-fic: Add support for irq retrigger (diff) | |
| download | linux-212fbf2c9e84ceb267cadd8342156b69b54b8135.tar.xz linux-212fbf2c9e84ceb267cadd8342156b69b54b8135.zip | |
irqchip/atmel-aic5: Add support for sam9x60 irqchip
Add support for SAM9X60 irqchip.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1568026835-6646-1-git-send-email-claudiu.beznea@microchip.com
[claudiu.beznea@microchip.com: update aic5_irq_fixups[], update
documentation]
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/irqchip/irq-atmel-aic5.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c index 6acad2ea0fb3..29333497ba10 100644 --- a/drivers/irqchip/irq-atmel-aic5.c +++ b/drivers/irqchip/irq-atmel-aic5.c @@ -313,6 +313,7 @@ static void __init sama5d3_aic_irq_fixup(void) static const struct of_device_id aic5_irq_fixups[] __initconst = { { .compatible = "atmel,sama5d3", .data = sama5d3_aic_irq_fixup }, { .compatible = "atmel,sama5d4", .data = sama5d3_aic_irq_fixup }, + { .compatible = "microchip,sam9x60", .data = sama5d3_aic_irq_fixup }, { /* sentinel */ }, }; @@ -390,3 +391,12 @@ static int __init sama5d4_aic5_of_init(struct device_node *node, return aic5_of_init(node, parent, NR_SAMA5D4_IRQS); } IRQCHIP_DECLARE(sama5d4_aic5, "atmel,sama5d4-aic", sama5d4_aic5_of_init); + +#define NR_SAM9X60_IRQS 50 + +static int __init sam9x60_aic5_of_init(struct device_node *node, + struct device_node *parent) +{ + return aic5_of_init(node, parent, NR_SAM9X60_IRQS); +} +IRQCHIP_DECLARE(sam9x60_aic5, "microchip,sam9x60-aic", sam9x60_aic5_of_init); |