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authorChris Wilson <chris@chris-wilson.co.uk>2010-08-07 12:01:37 +0200
committerEric Anholt <eric@anholt.net>2010-08-09 20:24:35 +0200
commitc27ba48e629d2a845f26489fcddc9912673711e7 (patch)
treeaf93d8615001414a403a19aca867307b9b2cf41c /drivers
parentdrm/i915/edp: Flush the write before waiting for PLLs (diff)
downloadlinux-c27ba48e629d2a845f26489fcddc9912673711e7.tar.xz
linux-c27ba48e629d2a845f26489fcddc9912673711e7.zip
drm/i915: FBC is updated within set_base() so remove second call in mode_set()
The FBC is dependent upon a few details of the framebuffer so it is required to be updated within set_base(), so remove the redundant call from mode_set(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2a32a7b60c96..41b4caf3d1d8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4171,9 +4171,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
/* Flush the plane changes */
ret = intel_pipe_set_base(crtc, x, y, old_fb);
- if ((IS_I965G(dev) || plane == 0))
- intel_update_fbc(crtc, &crtc->mode);
-
intel_update_watermarks(dev);
drm_vblank_post_modeset(dev, pipe);