diff options
| author | oulijun <oulijun@huawei.com> | 2017-11-10 09:55:51 +0100 |
|---|---|---|
| committer | Doug Ledford <dledford@redhat.com> | 2017-11-10 18:32:02 +0100 |
| commit | e8d1853357d237e6af69e384d6b05a23e3a70b93 (patch) | |
| tree | 1ab05c304f608a742974994eba1a7a1d369cad81 /drivers | |
| parent | RDMA/hns: Add sq_invld_flg field in QP context (diff) | |
| download | linux-e8d1853357d237e6af69e384d6b05a23e3a70b93.tar.xz linux-e8d1853357d237e6af69e384d6b05a23e3a70b93.zip | |
RDMA/hns: Set the owner field of SQWQE in hip08 RoCE
the owner need to be set when posting sqwqe in hip08 RoCE.
The owner be used according to the below algorithm:
The value of owner should be 1 in the first lap, it
should be 0 in the second lap and in turn.
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Shaobo Xu <xushaobo2@huawei.com>
Signed-off-by: Yixian Liu <liuyixian@huawei.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c index c1f33251a73c..7008fa3add80 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c @@ -62,6 +62,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, struct hns_roce_v2_db sq_db; unsigned int sge_ind = 0; unsigned int wqe_sz = 0; + unsigned int owner_bit; unsigned long flags; unsigned int ind; void *wqe = NULL; @@ -104,6 +105,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] = wr->wr_id; + owner_bit = ~(qp->sq.head >> ilog2(qp->sq.wqe_cnt)) & 0x1; rc_sq_wqe = wqe; memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe)); for (i = 0; i < wr->num_sge; i++) @@ -120,6 +122,9 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S, (wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0); + roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OWNER_S, + owner_bit); + switch (wr->opcode) { case IB_WR_RDMA_READ: roce_set_field(rc_sq_wqe->byte_4, |