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| author | Chanho Park <chanho61.park@samsung.com> | 2021-10-18 14:42:04 +0200 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2021-10-28 05:10:10 +0200 |
| commit | e387d448e4899f4bbf7c8151472a2fed72063d82 (patch) | |
| tree | 3661df1fb6c8d0a29de4b5aa82de8959977de782 /drivers | |
| parent | scsi: ufs: Add quirk to enable host controller without PH configuration (diff) | |
| download | linux-e387d448e4899f4bbf7c8151472a2fed72063d82.tar.xz linux-e387d448e4899f4bbf7c8151472a2fed72063d82.zip | |
scsi: ufs: ufs-exynos: Change pclk available max value
To support 167MHz PCLK, we need to adjust the maximum value.
Link: https://lore.kernel.org/r/20211018124216.153072-4-chanho61.park@samsung.com
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/scsi/ufs/ufs-exynos.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h index dadf4fd10dd8..0a31f77a5f48 100644 --- a/drivers/scsi/ufs/ufs-exynos.h +++ b/drivers/scsi/ufs/ufs-exynos.h @@ -99,7 +99,7 @@ struct exynos_ufs; #define PA_HIBERN8TIME_VAL 0x20 #define PCLK_AVAIL_MIN 70000000 -#define PCLK_AVAIL_MAX 133000000 +#define PCLK_AVAIL_MAX 167000000 struct exynos_ufs_uic_attr { /* TX Attributes */ |