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| author | Stephen Warren <swarren@nvidia.com> | 2013-10-28 23:56:14 +0100 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-12-04 20:25:12 +0100 |
| commit | 354935a9e804878ec64a86ad8b7f091d544dcb54 (patch) | |
| tree | 2504a5686897e5d6df49c4cbbae0c84203bc5e81 /drivers | |
| parent | ARM: tegra: switch FUSE clock on before usage (diff) | |
| download | linux-354935a9e804878ec64a86ad8b7f091d544dcb54.tar.xz linux-354935a9e804878ec64a86ad8b7f091d544dcb54.zip | |
ARM: tegra: fix DEBUG_LL combined with LPAE
The DEBUG_LL UART address is mapped as an MMU section, hence, the
virtual address must be section-aligned. Sections are 1MB without LPAE
and 2MB with LPAE. Tegra's virtual address was only aligned to 1MB, and
hence the mapping was set up incorrectly with LPAE enabled, thus causing
a hang early during boot. Fix this by picking a different virtual address
that is aligned to 2MB.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers')
0 files changed, 0 insertions, 0 deletions