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authorTinghan Shen <tinghan.shen@mediatek.com>2022-06-01 13:22:01 +0200
committerLee Jones <lee@kernel.org>2022-07-19 11:54:39 +0200
commit66ee379d743c69c726b61d078119a34d5be96a35 (patch)
treee8e0176d8907e2a3c22b9f0d435558f2982e0061 /drivers
parentmfd: mt6358-irq: Add MT6357 PMIC support (diff)
downloadlinux-66ee379d743c69c726b61d078119a34d5be96a35.tar.xz
linux-66ee379d743c69c726b61d078119a34d5be96a35.zip
mfd: cros_ec: Add SCP Core-1 as a new CrOS EC MCU
MT8195 System Companion Processors(SCP) is a dual-core RISC-V MCU. Add a new CrOS feature ID to represent the SCP's 2nd core. The 1st core is referred to as 'core 0', and the 2nd core is referred to as 'core 1'. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220601112201.15510-16-tinghan.shen@mediatek.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/cros_ec_dev.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c
index 596731caf407..07cc31d92edc 100644
--- a/drivers/mfd/cros_ec_dev.c
+++ b/drivers/mfd/cros_ec_dev.c
@@ -65,6 +65,11 @@ static const struct cros_feature_to_name cros_mcu_devices[] = {
.desc = "System Control Processor",
},
{
+ .id = EC_FEATURE_SCP_C1,
+ .name = CROS_EC_DEV_SCP_C1_NAME,
+ .desc = "System Control Processor 2nd Core",
+ },
+ {
.id = EC_FEATURE_TOUCHPAD,
.name = CROS_EC_DEV_TP_NAME,
.desc = "Touchpad",