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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2010-02-19 11:52:02 +0100 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-02-26 22:23:22 +0100 |
| commit | 16edd55029fcedaa0d03f24ee607c3a882871a10 (patch) | |
| tree | 7c5262d63b30c34c8db2024b5904d8849f0781e2 /drivers | |
| parent | drm/i915: clean-up i915_gem_flush_gpu_write_domain (diff) | |
| download | linux-16edd55029fcedaa0d03f24ee607c3a882871a10.tar.xz linux-16edd55029fcedaa0d03f24ee607c3a882871a10.zip | |
drm/i915: check for multiple write domains in pin_and_relocate
The assumption that an object has only ever one write domain is deeply
threaded into gem (it's even encoded the the singular of the variable
name). Don't let userspace screw us over.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6fe54db8f33c..fba37e9f775d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3367,6 +3367,16 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, } /* Validate that the target is in a valid r/w GPU domain */ + if (reloc->write_domain & (reloc->write_domain - 1)) { + DRM_ERROR("reloc with multiple write domains: " + "obj %p target %d offset %d " + "read %08x write %08x", + obj, reloc->target_handle, + (int) reloc->offset, + reloc->read_domains, + reloc->write_domain); + return -EINVAL; + } if (reloc->write_domain & I915_GEM_DOMAIN_CPU || reloc->read_domains & I915_GEM_DOMAIN_CPU) { DRM_ERROR("reloc with read/write CPU domains: " |