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author | Parshuram Thombare <pthombar@cadence.com> | 2020-09-05 10:21:33 +0200 |
---|---|---|
committer | Jakub Kicinski <kuba@kernel.org> | 2020-09-06 20:58:59 +0200 |
commit | d7739b0b6d15ef9ad5c79424736b8ded5ed3e913 (patch) | |
tree | ef8d129f6c844f0cc06693abb9a0133e93adeaee /drivers | |
parent | cxgb4: Fix offset when clearing filter byte counters (diff) | |
download | linux-d7739b0b6d15ef9ad5c79424736b8ded5ed3e913.tar.xz linux-d7739b0b6d15ef9ad5c79424736b8ded5ed3e913.zip |
net: macb: fix for pause frame receive enable bit
PAE bit of NCFGR register, when set, pauses transmission
if a non-zero 802.3 classic pause frame is received.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Signed-off-by: Parshuram Thombare <pthombar@cadence.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/ethernet/cadence/macb_main.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 6761f404b8aa..9179f7b0b900 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -647,8 +647,7 @@ static void macb_mac_link_up(struct phylink_config *config, ctrl |= GEM_BIT(GBE); } - /* We do not support MLO_PAUSE_RX yet */ - if (tx_pause) + if (rx_pause) ctrl |= MACB_BIT(PAE); macb_set_tx_clk(bp->tx_clk, speed, ndev); |