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authorImre Deak <imre.deak@intel.com>2015-11-09 19:16:26 +0100
committerImre Deak <imre.deak@intel.com>2015-11-17 17:43:30 +0100
commite64e6bd0f46c78b53b236474f59bd1290b834c89 (patch)
tree00514a00272fa24549368dbf297b1d0d09a14e97 /drivers
parentdrm/i915: Serialise updates to GGTT with access through GGTT on Braswell (diff)
downloadlinux-e64e6bd0f46c78b53b236474f59bd1290b834c89.tar.xz
linux-e64e6bd0f46c78b53b236474f59bd1290b834c89.zip
drm/i915: get runtime PM reference around GEM set_tiling IOCTL
After fixing the same issue in the set_caching IOCTL and Chris' request to check out the possibilities for an improved RPM ref handling I noticed that we have the same issue in the set_tiling IOCTL. Fix this up.I didn't see any bug reports about this one, but the GTT unbind operation on this path accesses the HW, which needs the ref. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1447092986-11165-1-git-send-email-imre.deak@intel.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 8a6717cc265c..7410f6c962e7 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -176,6 +176,8 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
return -EINVAL;
}
+ intel_runtime_pm_get(dev_priv);
+
mutex_lock(&dev->struct_mutex);
if (obj->pin_display || obj->framebuffer_references) {
ret = -EBUSY;
@@ -269,6 +271,8 @@ err:
drm_gem_object_unreference(&obj->base);
mutex_unlock(&dev->struct_mutex);
+ intel_runtime_pm_put(dev_priv);
+
return ret;
}