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authorKonrad Dybcio <konrad.dybcio@linaro.org>2023-02-08 10:13:32 +0100
committerBjorn Andersson <andersson@kernel.org>2023-03-13 20:59:44 +0100
commit0932e565ba7c828d5ec59f872cb3ad6b070dc003 (patch)
treebe2b23a18add6fec0a26a2580bfb7feafff00b62 /drivers
parentclk: qcom: branch: Add helper functions for setting retain bits (diff)
downloadlinux-0932e565ba7c828d5ec59f872cb3ad6b070dc003.tar.xz
linux-0932e565ba7c828d5ec59f872cb3ad6b070dc003.zip
clk: qcom: branch: Add helper functions for setting SLEEP/WAKE bits
HLOS-controlled branch clocks on non-ancient Qualcomm platforms feature SLEEP and WAKE fields which can be written to to configure how long the clock hardware should wait internally before being (un)gated. Some very sensitive clocks need to have these values programmed to prevent putting the hardware in a not-exactly-good state. Add definitions of these fields and introduce helpers for setting them inside clock drivers. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-3-konrad.dybcio@linaro.org
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/qcom/clk-branch.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h
index 55b3a2c3afed..b325f943c3e0 100644
--- a/drivers/clk/qcom/clk-branch.h
+++ b/drivers/clk/qcom/clk-branch.h
@@ -4,6 +4,7 @@
#ifndef __QCOM_CLK_BRANCH_H__
#define __QCOM_CLK_BRANCH_H__
+#include <linux/bitfield.h>
#include <linux/clk-provider.h>
#include "clk-regmap.h"
@@ -41,6 +42,8 @@ struct clk_branch {
#define CBCR_FORCE_MEM_CORE_ON BIT(14)
#define CBCR_FORCE_MEM_PERIPH_ON BIT(13)
#define CBCR_FORCE_MEM_PERIPH_OFF BIT(12)
+#define CBCR_WAKEUP GENMASK(11, 8)
+#define CBCR_SLEEP GENMASK(7, 4)
static inline void qcom_branch_set_force_mem_core(struct regmap *regmap,
struct clk_branch clk, bool on)
@@ -63,6 +66,18 @@ static inline void qcom_branch_set_force_periph_off(struct regmap *regmap,
on ? CBCR_FORCE_MEM_PERIPH_OFF : 0);
}
+static inline void qcom_branch_set_wakeup(struct regmap *regmap, struct clk_branch clk, u32 val)
+{
+ regmap_update_bits(regmap, clk.halt_reg, CBCR_WAKEUP,
+ FIELD_PREP(CBCR_WAKEUP, val));
+}
+
+static inline void qcom_branch_set_sleep(struct regmap *regmap, struct clk_branch clk, u32 val)
+{
+ regmap_update_bits(regmap, clk.halt_reg, CBCR_SLEEP,
+ FIELD_PREP(CBCR_SLEEP, val));
+}
+
extern const struct clk_ops clk_branch_ops;
extern const struct clk_ops clk_branch2_ops;
extern const struct clk_ops clk_branch_simple_ops;