diff options
| author | Joe Perches <joe@perches.com> | 2019-07-10 07:04:20 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2019-07-11 23:30:07 +0200 |
| commit | 937a944090cca2f19458fd037a8aff61c546f0cd (patch) | |
| tree | 6848f3abf42ac87ef1fffed923727554c7efc2f5 /drivers | |
| parent | net: fib_rules: do not flow dissect local packets (diff) | |
| download | linux-937a944090cca2f19458fd037a8aff61c546f0cd.tar.xz linux-937a944090cca2f19458fd037a8aff61c546f0cd.zip | |
net: ethernet: mediatek: Fix misuses of GENMASK macro
Arguments are supposed to be ordered high then low.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/mediatek/mtk_sgmii.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h index c6be599ed94d..bab94f763e2c 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -723,7 +723,7 @@ struct mtk_soc_data { #define MTK_MAX_DEVS 2 #define MTK_SGMII_PHYSPEED_AN BIT(31) -#define MTK_SGMII_PHYSPEED_MASK GENMASK(0, 2) +#define MTK_SGMII_PHYSPEED_MASK GENMASK(2, 0) #define MTK_SGMII_PHYSPEED_1000 BIT(0) #define MTK_SGMII_PHYSPEED_2500 BIT(1) #define MTK_HAS_FLAGS(flags, _x) (((flags) & (_x)) == (_x)) diff --git a/drivers/net/ethernet/mediatek/mtk_sgmii.c b/drivers/net/ethernet/mediatek/mtk_sgmii.c index 136f90ce5a65..ff509d42d818 100644 --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c @@ -82,7 +82,7 @@ int mtk_sgmii_setup_mode_force(struct mtk_sgmii *ss, int id) return -EINVAL; regmap_read(ss->regmap[id], ss->ana_rgc3, &val); - val &= ~GENMASK(2, 3); + val &= ~GENMASK(3, 2); mode = ss->flags[id] & MTK_SGMII_PHYSPEED_MASK; val |= (mode == MTK_SGMII_PHYSPEED_1000) ? 0 : BIT(2); regmap_write(ss->regmap[id], ss->ana_rgc3, val); |