diff options
author | Samson Tam <samson.tam@amd.com> | 2022-07-25 20:04:26 +0200 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-08-17 00:09:25 +0200 |
commit | ca01eba4e5b6b50144a62d7704763c41b68a0de9 (patch) | |
tree | 70e2aa4d040dd9c821ed23298fd18c091dc5f86b /drivers | |
parent | drm/amd/display: avoid doing vm_init multiple time (diff) | |
download | linux-ca01eba4e5b6b50144a62d7704763c41b68a0de9.tar.xz linux-ca01eba4e5b6b50144a62d7704763c41b68a0de9.zip |
drm/amd/display: add chip revision to DCN32
[Why & How]
Add GC_11_0_3_A0 as a chip revision to the DCN32 family
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/display/include/dal_asic_id.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h index e054f3494087..9f3558c0ef11 100644 --- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h +++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h @@ -247,10 +247,12 @@ enum { #define AMDGPU_FAMILY_GC_11_0_1 148 #define GC_11_0_0_A0 0x1 #define GC_11_0_2_A0 0x10 +#define GC_11_0_3_A0 0x20 #define GC_11_UNKNOWN 0xFF #define ASICREV_IS_GC_11_0_0(eChipRev) (eChipRev < GC_11_0_2_A0) -#define ASICREV_IS_GC_11_0_2(eChipRev) (eChipRev >= GC_11_0_2_A0 && eChipRev < GC_11_UNKNOWN) +#define ASICREV_IS_GC_11_0_2(eChipRev) (eChipRev >= GC_11_0_2_A0 && eChipRev < GC_11_0_3_A0) +#define ASICREV_IS_GC_11_0_3(eChipRev) (eChipRev >= GC_11_0_3_A0 && eChipRev < GC_11_UNKNOWN) /* * ASIC chip ID |