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authorDmitry Osipenko <digetx@gmail.com>2018-05-18 22:06:36 +0200
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2018-05-21 13:44:24 +0200
commit64cd64e72bc26e60457094b93d93eaeee08ddd47 (patch)
treef172d150b08e0226163a0c10c2b48a63a78a4475 /drivers
parentcpufreq: tegra20: Remove EMC clock usage (diff)
downloadlinux-64cd64e72bc26e60457094b93d93eaeee08ddd47.tar.xz
linux-64cd64e72bc26e60457094b93d93eaeee08ddd47.zip
cpufreq: tegra20: Release clocks properly
Properly put requested clocks in the module init/exit code. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/cpufreq/tegra20-cpufreq.c31
1 files changed, 26 insertions, 5 deletions
diff --git a/drivers/cpufreq/tegra20-cpufreq.c b/drivers/cpufreq/tegra20-cpufreq.c
index 4b09a8b410c4..ea186d3f0faf 100644
--- a/drivers/cpufreq/tegra20-cpufreq.c
+++ b/drivers/cpufreq/tegra20-cpufreq.c
@@ -161,24 +161,45 @@ static struct cpufreq_driver tegra_cpufreq_driver = {
static int __init tegra_cpufreq_init(void)
{
+ int err;
+
cpu_clk = clk_get_sys(NULL, "cclk");
if (IS_ERR(cpu_clk))
return PTR_ERR(cpu_clk);
pll_x_clk = clk_get_sys(NULL, "pll_x");
- if (IS_ERR(pll_x_clk))
- return PTR_ERR(pll_x_clk);
+ if (IS_ERR(pll_x_clk)) {
+ err = PTR_ERR(pll_x_clk);
+ goto put_cpu;
+ }
pll_p_clk = clk_get_sys(NULL, "pll_p");
- if (IS_ERR(pll_p_clk))
- return PTR_ERR(pll_p_clk);
+ if (IS_ERR(pll_p_clk)) {
+ err = PTR_ERR(pll_p_clk);
+ goto put_pll_x;
+ }
+
+ err = cpufreq_register_driver(&tegra_cpufreq_driver);
+ if (err)
+ goto put_pll_p;
+
+ return 0;
+
+put_pll_p:
+ clk_put(pll_p_clk);
+put_pll_x:
+ clk_put(pll_x_clk);
+put_cpu:
+ clk_put(cpu_clk);
- return cpufreq_register_driver(&tegra_cpufreq_driver);
+ return err;
}
static void __exit tegra_cpufreq_exit(void)
{
cpufreq_unregister_driver(&tegra_cpufreq_driver);
+ clk_put(pll_p_clk);
+ clk_put(pll_x_clk);
clk_put(cpu_clk);
}