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authorElaine Zhang <zhangqing@rock-chips.com>2017-05-02 09:34:03 +0200
committerHeiko Stuebner <heiko@sntech.de>2017-06-02 15:42:38 +0200
commitf2893aaba435fcb55b86dc1be8c6f64f8d60e64b (patch)
tree937bdf1ecbf67484be6eb0eb151e6fd7d7bfe293 /drivers
parentclk: rockchip: add clock controller for rk3128 (diff)
downloadlinux-f2893aaba435fcb55b86dc1be8c6f64f8d60e64b.tar.xz
linux-f2893aaba435fcb55b86dc1be8c6f64f8d60e64b.zip
clk: rockchip: mark pclk_ddrupctl as critical_clock on rk3036
No driver to handle this clk yet, but chip design requiress for this clock supplying the ddr controller to be always on. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/rockchip/clk-rk3036.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c
index 00d4150e33c3..c3001980dbdc 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -436,6 +436,7 @@ static const char *const rk3036_critical_clocks[] __initconst = {
"aclk_peri",
"hclk_peri",
"pclk_peri",
+ "pclk_ddrupctl",
};
static void __init rk3036_clk_init(struct device_node *np)