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authorJianguo Chen <chenjianguo3@huawei.com>2019-03-20 19:54:21 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2019-03-21 12:08:26 +0100
commitfca269f201a8d9985c0a31fb60b15d4eb57cef80 (patch)
tree7e7441a8d917b4bb087ca1012749e38ba0899239 /drivers
parentirqchip/stm32: Don't set rising configuration registers at init (diff)
downloadlinux-fca269f201a8d9985c0a31fb60b15d4eb57cef80.tar.xz
linux-fca269f201a8d9985c0a31fb60b15d4eb57cef80.zip
irqchip/mbigen: Don't clear eventid when freeing an MSI
mbigen_write_msg clears eventid bits of a mbigen register when free a interrupt, because msi_domain_deactivate memset struct msg to zero. Then multiple mbigen pins with zero eventid will report the same interrupt number. The eventid clear call trace: free_irq __free_irq irq_shutdown irq_domain_deactivate_irq __irq_domain_deactivate_irq __irq_domain_deactivate_irq msi_domain_deactivate platform_msi_write_msg mbigen_write_msg Signed-off-by: Jianguo Chen <chenjianguo3@huawei.com> [maz: massaged subject] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/irqchip/irq-mbigen.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index 567b29c47608..98b6e1d4b1a6 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -161,6 +161,9 @@ static void mbigen_write_msg(struct msi_desc *desc, struct msi_msg *msg)
void __iomem *base = d->chip_data;
u32 val;
+ if (!msg->address_lo && !msg->address_hi)
+ return;
+
base += get_mbigen_vec_reg(d->hwirq);
val = readl_relaxed(base);