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| author | Dan Williams <dan.j.williams@intel.com> | 2009-11-20 01:07:57 +0100 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-11-20 01:07:57 +0100 |
| commit | 6f82b83b7a56bc6e9dd6d7b93531dde6027c5309 (patch) | |
| tree | d6f9fc6064e60711e1d041a48d8ff0927ca819e7 /drivers | |
| parent | ioat3: dca and raid operations are incompatible (diff) | |
| download | linux-6f82b83b7a56bc6e9dd6d7b93531dde6027c5309.tar.xz linux-6f82b83b7a56bc6e9dd6d7b93531dde6027c5309.zip | |
ioat2,3: disable asynchronous error notifications
Error interrupts and error completions may cause channel hangs, so
poll the channel status register after a timeout.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/dma/ioat/registers.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h index 63038e18ab03..f015ec196700 100644 --- a/drivers/dma/ioat/registers.h +++ b/drivers/dma/ioat/registers.h @@ -92,9 +92,7 @@ #define IOAT_CHANCTRL_ERR_COMPLETION_EN 0x0004 #define IOAT_CHANCTRL_INT_REARM 0x0001 #define IOAT_CHANCTRL_RUN (IOAT_CHANCTRL_INT_REARM |\ - IOAT_CHANCTRL_ERR_COMPLETION_EN |\ - IOAT_CHANCTRL_ANY_ERR_ABORT_EN |\ - IOAT_CHANCTRL_ERR_INT_EN) + IOAT_CHANCTRL_ANY_ERR_ABORT_EN) #define IOAT_DMA_COMP_OFFSET 0x02 /* 16-bit DMA channel compatibility */ #define IOAT_DMA_COMP_V1 0x0001 /* Compatibility with DMA version 1 */ |