diff options
| author | Liguo Zhang <liguo.zhang@mediatek.com> | 2015-12-15 08:22:26 +0100 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2016-01-03 19:38:22 +0100 |
| commit | 8378d01f60a95d9205c6da47cb0cd2a594f7e07f (patch) | |
| tree | e1697e1f5732be4bb47263406cff8713cc0c7bef /drivers | |
| parent | i2c: imx: improve code readability (diff) | |
| download | linux-8378d01f60a95d9205c6da47cb0cd2a594f7e07f.tar.xz linux-8378d01f60a95d9205c6da47cb0cd2a594f7e07f.zip | |
i2c: mediatek: fix i2c multi transfer issue in high speed mode
For mt8173 platform with auto restart support, when doing i2c multi
transfer in high speed, we should ignore the first restart irq after
the master code, otherwise the first transfer will be discarded.
Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com>
Reviewed-by: Eddie Huang <eddie.huang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/i2c/busses/i2c-mt65xx.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c index dc4aac64ac2e..aec8e6ce38a4 100644 --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c @@ -155,6 +155,7 @@ struct mtk_i2c { u16 timing_reg; u16 high_speed_reg; unsigned char auto_restart; + bool ignore_restart_irq; const struct mtk_i2c_compatible *dev_comp; }; @@ -539,6 +540,14 @@ static int mtk_i2c_transfer(struct i2c_adapter *adap, } } + if (i2c->auto_restart && num >= 2 && i2c->speed_hz > MAX_FS_MODE_SPEED) + /* ignore the first restart irq after the master code, + * otherwise the first transfer will be discarded. + */ + i2c->ignore_restart_irq = true; + else + i2c->ignore_restart_irq = false; + while (left_num--) { if (!msgs->buf) { dev_dbg(i2c->dev, "data buffer is NULL.\n"); @@ -592,8 +601,16 @@ static irqreturn_t mtk_i2c_irq(int irqno, void *dev_id) * i2c->irq_stat need keep the two interrupt value. */ i2c->irq_stat |= intr_stat; - if (i2c->irq_stat & (I2C_TRANSAC_COMP | restart_flag)) - complete(&i2c->msg_complete); + + if (i2c->ignore_restart_irq && (i2c->irq_stat & restart_flag)) { + i2c->ignore_restart_irq = false; + i2c->irq_stat = 0; + writew(I2C_RS_MUL_CNFG | I2C_RS_MUL_TRIG | I2C_TRANSAC_START, + i2c->base + OFFSET_START); + } else { + if (i2c->irq_stat & (I2C_TRANSAC_COMP | restart_flag)) + complete(&i2c->msg_complete); + } return IRQ_HANDLED; } |