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author | Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> | 2017-07-06 11:06:41 +0200 |
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committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2017-07-06 20:39:28 +0200 |
commit | d466d3c1217406b14b834335b5b4b33c0d45bd09 (patch) | |
tree | 9a012be79bd30126f336fb2b307d5328622569e8 /drivers | |
parent | iio: accel: st_accel: add SPI-3wire support (diff) | |
download | linux-d466d3c1217406b14b834335b5b4b33c0d45bd09.tar.xz linux-d466d3c1217406b14b834335b5b4b33c0d45bd09.zip |
iio: adc: vf610_adc: Fix VALT selection value for REFSEL bits
In order to select the alternate voltage reference pair (VALTH/VALTL), the
right value for the REFSEL field in the ADCx_CFG register is "01", leading
to 0x800 as register mask. See section 8.2.6.4 in the reference manual[1].
[1] http://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf
Fixes: a775427632fd ("iio:adc:imx: add Freescale Vybrid vf610 adc driver")
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/iio/adc/vf610_adc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c index 01fc76f7d660..c168e0db329a 100644 --- a/drivers/iio/adc/vf610_adc.c +++ b/drivers/iio/adc/vf610_adc.c @@ -77,7 +77,7 @@ #define VF610_ADC_ADSTS_MASK 0x300 #define VF610_ADC_ADLPC_EN 0x80 #define VF610_ADC_ADHSC_EN 0x400 -#define VF610_ADC_REFSEL_VALT 0x100 +#define VF610_ADC_REFSEL_VALT 0x800 #define VF610_ADC_REFSEL_VBG 0x1000 #define VF610_ADC_ADTRG_HARD 0x2000 #define VF610_ADC_AVGS_8 0x4000 |