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authorDouglas Anderson <dianders@chromium.org>2020-06-27 00:19:50 +0200
committerMark Brown <broonie@kernel.org>2020-06-29 20:14:06 +0200
commit638d8488ae00d2e5dd5033804e82b458d3cf85b1 (patch)
tree7003e64d2ee9c5b131a59b355a13f33b39a8c127 /drivers
parentspi: altera: fix module autoload (diff)
downloadlinux-638d8488ae00d2e5dd5033804e82b458d3cf85b1.tar.xz
linux-638d8488ae00d2e5dd5033804e82b458d3cf85b1.zip
spi: spi-geni-qcom: Don't set the cs if it was already right
Setting the chip select on the Qualcomm geni SPI controller isn't exactly cheap. Let's cache the current setting and avoid setting the chip select if it's already right. Using "flashrom" to read or write the EC firmware on a Chromebook shows roughly a 25% reduction in interrupts and a 15% speedup. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200626151946.1.I06134fd669bf91fd387dc6ecfe21d44c202bd412@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/spi-geni-qcom.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 5b1dca1fff79..e99a9d57449f 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -79,6 +79,7 @@ struct spi_geni_master {
unsigned int oversampling;
spinlock_t lock;
int irq;
+ bool cs_flag;
};
static int get_spi_clk_cfg(unsigned int speed_hz,
@@ -146,10 +147,15 @@ static void spi_geni_set_cs(struct spi_device *slv, bool set_flag)
struct geni_se *se = &mas->se;
unsigned long time_left;
- pm_runtime_get_sync(mas->dev);
if (!(slv->mode & SPI_CS_HIGH))
set_flag = !set_flag;
+ if (set_flag == mas->cs_flag)
+ return;
+
+ mas->cs_flag = set_flag;
+
+ pm_runtime_get_sync(mas->dev);
spin_lock_irq(&mas->lock);
reinit_completion(&mas->cs_done);
if (set_flag)