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author | Thierry Reding <treding@nvidia.com> | 2017-05-04 22:10:31 +0200 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-07-03 01:46:20 +0200 |
commit | c016555091119b469fe49d1b1b359f0ae3fc6ed7 (patch) | |
tree | 799b0b293f7e2ab6ece698bde2c874197d1a3989 /firmware/radeon/RV630_me.bin.ihex | |
parent | arm64: PCI: Drop DT IRQ allocation from pcibios_alloc_irq() (diff) | |
download | linux-c016555091119b469fe49d1b1b359f0ae3fc6ed7.tar.xz linux-c016555091119b469fe49d1b1b359f0ae3fc6ed7.zip |
PCI: tegra: Support MSI 64-bit addressing
The MSI target address can reside beyond the 32-bit boundary on devices
with more than 2 GiB of system memory. The PCI host bridge on Tegra can
easily support 64-bit addresses, so make sure to pass the upper 32 bits of
the target address to endpoints when allocating MSI entries.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'firmware/radeon/RV630_me.bin.ihex')
0 files changed, 0 insertions, 0 deletions