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authorSuman Anna <s-anna@ti.com>2017-01-19 18:44:11 +0100
committerSantosh Shilimkar <ssantosh@kernel.org>2017-01-19 18:44:11 +0100
commit2ae4dad3523be2779a5844348c8bf84d1c9c1584 (patch)
tree2994f4586a99e4da13feb70cdf0252ad5ae2f9bd /fs/befs
parentARM: dts: keystone-k2hk: Add PSC reset controller node (diff)
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ARM: dts: keystone-k2l: Add PSC reset controller node
The Power Sleep Controller (PSC) module contains specific memory-mapped registers that can be used to perform reset management using specific bits for the DSPs available on the SoC. The PSC is defined using a syscon node, and the reset functionality is defined using a child syscon reset controller node. Add this syscon reset controller node as well as the reset control data for the resets it supports for the 66AK2L SoCs. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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