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authorAndreas Herrmann <andreas.herrmann3@amd.com>2011-02-24 15:53:46 +0100
committerIngo Molnar <mingo@elte.hu>2011-02-24 20:30:21 +0100
commit7f74f8f28a2bd9db9404f7d364e2097a0c42cc12 (patch)
treea06deae1932fcbd79e76b0099d411fb2d6953e0f /fs/btrfs
parentx86/mrst: Fix apb timer rating when lapic timer is used (diff)
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x86 quirk: Fix polarity for IRQ0 pin2 override on SB800 systems
On some SB800 systems polarity for IOAPIC pin2 is wrongly specified as low active by BIOS. This caused system hangs after resume from S3 when HPET was used in one-shot mode on such systems because a timer interrupt was missed (HPET signal is high active). For more details see: http://marc.info/?l=linux-kernel&m=129623757413868 Tested-by: Manoj Iyer <manoj.iyer@canonical.com> Tested-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Borislav Petkov <borislav.petkov@amd.com> Cc: stable@kernel.org # 37.x, 32.x LKML-Reference: <20110224145346.GD3658@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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