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authorLinus Torvalds <torvalds@linux-foundation.org>2010-09-10 03:31:34 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2010-09-10 03:31:34 +0200
commit152831be91dfe864e06c3b3ff2bf994e04df4cdf (patch)
treeebacd4419074ad8b143b059094f5e2ec347d25fc /fs
parentlglock: make lg_lock_global() actually lock globally (diff)
parentARM: Update mach-types (diff)
downloadlinux-152831be91dfe864e06c3b3ff2bf994e04df4cdf.tar.xz
linux-152831be91dfe864e06c3b3ff2bf994e04df4cdf.zip
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits) ARM: Update mach-types ARM: Partially revert "Auto calculate ZRELADDR and provide option for exceptions" ARM: Ensure PTE modifications via dma_alloc_coherent are visible ARM: 6359/1: ep93xx: move clock initialization earlier Revert "[ARM] pxa: remove now unnecessary dma_needs_bounce()" ARM: 6352/1: perf: fix event validation ARM: 6344/1: Mark CPU_32v6K as depended on CPU_V7 ARM: 6343/1: wire up fanotify and prlimit64 syscalls on ARM ARM: 6330/1: perf: reword comments relating to perf_event_do_pending ARM: pxa168fb: fix section mismatch ARM: pxa: Make id const in pwm_probe() ARM: pxa: fix CI_HSYNC and CI_VSYNC MFP defines for pxa300 ARM: pxa: remove __init from cpufreq_driver->init() ARM: imx: set cache line size to 64 bytes for i.MX5 mx5/clock: fix clear bit fields issue in _clk_ccgr_disable function mxc/tzic: add base address when accessing TZIC registers ARM: mach-shmobile: ap4evb: fix write protect for SDHI1 ARM: mach-shmobile: ap4evb: modify FSI2 ID ARM: mach-shmobile: do not enable the PLLC2 clock on init ARM: mach-shmobile: Clock framework comment fix ...
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