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authorAndrew Victor <andrew@sanpeople.com>2007-02-05 11:42:07 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-08 15:50:56 +0100
commit9d0412680e6c7b685ee466842047bcfb924d6dc5 (patch)
treec79300964ef1aca5d24571696f95e76b37c14679 /include/asm-arm/arch-at91/at91_pdc.h
parent[ARM] 4119/1: AT91: Fix build of AT91SAM9260 (diff)
downloadlinux-9d0412680e6c7b685ee466842047bcfb924d6dc5.tar.xz
linux-9d0412680e6c7b685ee466842047bcfb924d6dc5.zip
[ARM] 4124/1: Rename mach-at91rm9200 and arch-at91rm9200 directories
Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91/at91_pdc.h')
-rw-r--r--include/asm-arm/arch-at91/at91_pdc.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91/at91_pdc.h b/include/asm-arm/arch-at91/at91_pdc.h
new file mode 100644
index 000000000000..a54adf52c65d
--- /dev/null
+++ b/include/asm-arm/arch-at91/at91_pdc.h
@@ -0,0 +1,36 @@
+/*
+ * include/asm-arm/arch-at91/at91_pdc.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Peripheral Data Controller (PDC) registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_PDC_H
+#define AT91_PDC_H
+
+#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */
+#define AT91_PDC_RCR 0x104 /* Receive Counter Register */
+#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */
+#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */
+#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */
+#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */
+#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
+#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */
+
+#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */
+#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
+#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
+#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
+#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
+
+#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */
+
+#endif