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authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-19 00:24:52 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 11:25:50 +0200
commitc680b77efe4542830bb170e1cc40db1c47c569bc (patch)
treeed79bf5cb4bab39e694690747c34cee8798c6d02 /include/asm-arm/arch-iop32x
parent[ARM] 3829/1: iop3xx: optimise irq entry macros (diff)
downloadlinux-c680b77efe4542830bb170e1cc40db1c47c569bc.tar.xz
linux-c680b77efe4542830bb170e1cc40db1c47c569bc.zip
[ARM] 3830/1: iop3xx: board support file cleanup
Revamp the iop3xx board support: move the support code for each iop board type into its own file, start using platform serial and platform physmap flash devices, switch to a per-board time tick rate, and get rid of the ARCH_EP80219 and STEPD config options by doing the relevant checks at run time. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop32x')
-rw-r--r--include/asm-arm/arch-iop32x/iop321.h12
-rw-r--r--include/asm-arm/arch-iop32x/iq31244.h7
-rw-r--r--include/asm-arm/arch-iop32x/iq80321.h7
-rw-r--r--include/asm-arm/arch-iop32x/irqs.h38
4 files changed, 0 insertions, 64 deletions
diff --git a/include/asm-arm/arch-iop32x/iop321.h b/include/asm-arm/arch-iop32x/iop321.h
index 1e57e0094767..8042946327ed 100644
--- a/include/asm-arm/arch-iop32x/iop321.h
+++ b/include/asm-arm/arch-iop32x/iop321.h
@@ -150,18 +150,6 @@
#define IOP321_IINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007D8)
#define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC)
-/* Timers */
-#ifdef CONFIG_ARCH_IQ80321
-#define IOP321_TICK_RATE 200000000 /* 200 MHz clock */
-#elif defined(CONFIG_ARCH_IQ31244)
-#define IOP321_TICK_RATE 198000000 /* 33.000 MHz crystal */
-#endif
-
-#ifdef CONFIG_ARCH_EP80219
-#undef IOP321_TICK_RATE
-#define IOP321_TICK_RATE 200000000 /* 33.333333 Mhz crystal */
-#endif
-
/* Application accelerator unit 0x00000800 - 0x000008FF */
#define IOP321_AAU_ACR (volatile u32 *)IOP321_REG_ADDR(0x00000800)
#define IOP321_AAU_ASR (volatile u32 *)IOP321_REG_ADDR(0x00000804)
diff --git a/include/asm-arm/arch-iop32x/iq31244.h b/include/asm-arm/arch-iop32x/iq31244.h
index f490063d2156..cf2d2343398d 100644
--- a/include/asm-arm/arch-iop32x/iq31244.h
+++ b/include/asm-arm/arch-iop32x/iq31244.h
@@ -7,18 +7,11 @@
#ifndef _IQ31244_H_
#define _IQ31244_H_
-#define IQ31244_FLASHBASE 0xf0000000 /* Flash */
-#define IQ31244_FLASHSIZE 0x00800000
-#define IQ31244_FLASHWIDTH 2
-
#define IQ31244_UART 0xfe800000 /* UART #1 */
#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */
#define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
#define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */
-#ifndef __ASSEMBLY__
-extern void iq31244_map_io(void);
-#endif
#endif // _IQ31244_H_
diff --git a/include/asm-arm/arch-iop32x/iq80321.h b/include/asm-arm/arch-iop32x/iq80321.h
index 7015a605ab64..55d70f49b7fd 100644
--- a/include/asm-arm/arch-iop32x/iq80321.h
+++ b/include/asm-arm/arch-iop32x/iq80321.h
@@ -7,18 +7,11 @@
#ifndef _IQ80321_H_
#define _IQ80321_H_
-#define IQ80321_FLASHBASE 0xf0000000 /* Flash */
-#define IQ80321_FLASHSIZE 0x00800000
-#define IQ80321_FLASHWIDTH 1
-
#define IQ80321_UART 0xfe800000 /* UART #1 */
#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */
#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */
-#ifndef __ASSEMBLY__
-extern void iq80321_map_io(void);
-#endif
#endif // _IQ80321_H_
diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h
index 9fefcf3372b1..a48327ced92e 100644
--- a/include/asm-arm/arch-iop32x/irqs.h
+++ b/include/asm-arm/arch-iop32x/irqs.h
@@ -47,42 +47,4 @@
#define NR_IRQS 32
-/*
- * Interrupts available on the IQ80321 board
- */
-
-/*
- * On board devices
- */
-#define IRQ_IQ80321_I82544 IRQ_IOP321_XINT0
-#define IRQ_IQ80321_UART IRQ_IOP321_XINT1
-
-/*
- * PCI interrupts
- */
-#define IRQ_IQ80321_INTA IRQ_IOP321_XINT0
-#define IRQ_IQ80321_INTB IRQ_IOP321_XINT1
-#define IRQ_IQ80321_INTC IRQ_IOP321_XINT2
-#define IRQ_IQ80321_INTD IRQ_IOP321_XINT3
-
-/*
- * Interrupts on the IQ31244 board
- */
-
-/*
- * On board devices
- */
-#define IRQ_IQ31244_UART IRQ_IOP321_XINT1
-#define IRQ_IQ31244_I82546 IRQ_IOP321_XINT0
-#define IRQ_IQ31244_SATA IRQ_IOP321_XINT2
-#define IRQ_IQ31244_PCIX_SLOT IRQ_IOP321_XINT3
-
-/*
- * PCI interrupts
- */
-#define IRQ_IQ31244_INTA IRQ_IOP321_XINT0
-#define IRQ_IQ31244_INTB IRQ_IOP321_XINT1
-#define IRQ_IQ31244_INTC IRQ_IOP321_XINT2
-#define IRQ_IQ31244_INTD IRQ_IOP321_XINT3
-
#endif // _IRQ_H_