diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-09-19 00:22:24 +0200 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 11:25:46 +0200 |
commit | 610300e8f4f833904096ca1233ffd9dbd73fb11f (patch) | |
tree | 2b8e26c511edbbfc666af184a3de984c03d06220 /include/asm-arm/arch-iop33x | |
parent | [ARM] 3825/1: iop3xx: use cp6 enable/disable macros (diff) | |
download | linux-610300e8f4f833904096ca1233ffd9dbd73fb11f.tar.xz linux-610300e8f4f833904096ca1233ffd9dbd73fb11f.zip |
[ARM] 3826/1: iop3xx: remove IOP3??_IRQ_OFS irq offset
Get rid of the unused IOP3??_IRQ_OFS irq offset define, start IRQ
numbering from zero.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop33x')
-rw-r--r-- | include/asm-arm/arch-iop33x/entry-macro.S | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-iop33x/irqs.h | 110 |
2 files changed, 39 insertions, 72 deletions
diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S index 57f6ea0069e4..425aa7aafa0e 100644 --- a/include/asm-arm/arch-iop33x/entry-macro.S +++ b/include/asm-arm/arch-iop33x/entry-macro.S @@ -30,6 +30,5 @@ b 1001f 1002: clz \irqnr, \irqstat rsbs \irqnr,\irqnr,#31 @ recommend by RMK - add \irqnr,\irqnr,#IRQ_IOP331_DMA0_EOT 1001: .endm diff --git a/include/asm-arm/arch-iop33x/irqs.h b/include/asm-arm/arch-iop33x/irqs.h index 45856a12815a..2e3ade3b5ff9 100644 --- a/include/asm-arm/arch-iop33x/irqs.h +++ b/include/asm-arm/arch-iop33x/irqs.h @@ -15,78 +15,46 @@ /* * IOP80331 chipset interrupts */ -#define IOP331_IRQ_OFS 0 -#define IOP331_IRQ(x) (IOP331_IRQ_OFS + (x)) +#define IRQ_IOP331_DMA0_EOT 0 +#define IRQ_IOP331_DMA0_EOC 1 +#define IRQ_IOP331_DMA1_EOT 2 +#define IRQ_IOP331_DMA1_EOC 3 +#define IRQ_IOP331_AA_EOT 6 +#define IRQ_IOP331_AA_EOC 7 +#define IRQ_IOP331_TIMER0 8 +#define IRQ_IOP331_TIMER1 9 +#define IRQ_IOP331_I2C_0 10 +#define IRQ_IOP331_I2C_1 11 +#define IRQ_IOP331_MSG 12 +#define IRQ_IOP331_MSGIBQ 13 +#define IRQ_IOP331_ATU_BIST 14 +#define IRQ_IOP331_PERFMON 15 +#define IRQ_IOP331_CORE_PMU 16 +#define IRQ_IOP331_XINT0 24 +#define IRQ_IOP331_XINT1 25 +#define IRQ_IOP331_XINT2 26 +#define IRQ_IOP331_XINT3 27 +#define IRQ_IOP331_XINT8 32 +#define IRQ_IOP331_XINT9 33 +#define IRQ_IOP331_XINT10 34 +#define IRQ_IOP331_XINT11 35 +#define IRQ_IOP331_XINT12 36 +#define IRQ_IOP331_XINT13 37 +#define IRQ_IOP331_XINT14 38 +#define IRQ_IOP331_XINT15 39 +#define IRQ_IOP331_UART0 51 +#define IRQ_IOP331_UART1 52 +#define IRQ_IOP331_PBIE 53 +#define IRQ_IOP331_ATU_CRW 54 +#define IRQ_IOP331_ATU_ERR 55 +#define IRQ_IOP331_MCU_ERR 56 +#define IRQ_IOP331_DMA0_ERR 57 +#define IRQ_IOP331_DMA1_ERR 58 +#define IRQ_IOP331_AA_ERR 60 +#define IRQ_IOP331_MSG_ERR 62 +#define IRQ_IOP331_HPI 63 -/* - * On IRQ or FIQ register - */ -#define IRQ_IOP331_DMA0_EOT IOP331_IRQ(0) -#define IRQ_IOP331_DMA0_EOC IOP331_IRQ(1) -#define IRQ_IOP331_DMA1_EOT IOP331_IRQ(2) -#define IRQ_IOP331_DMA1_EOC IOP331_IRQ(3) -#define IRQ_IOP331_RSVD_4 IOP331_IRQ(4) -#define IRQ_IOP331_RSVD_5 IOP331_IRQ(5) -#define IRQ_IOP331_AA_EOT IOP331_IRQ(6) -#define IRQ_IOP331_AA_EOC IOP331_IRQ(7) -#define IRQ_IOP331_TIMER0 IOP331_IRQ(8) -#define IRQ_IOP331_TIMER1 IOP331_IRQ(9) -#define IRQ_IOP331_I2C_0 IOP331_IRQ(10) -#define IRQ_IOP331_I2C_1 IOP331_IRQ(11) -#define IRQ_IOP331_MSG IOP331_IRQ(12) -#define IRQ_IOP331_MSGIBQ IOP331_IRQ(13) -#define IRQ_IOP331_ATU_BIST IOP331_IRQ(14) -#define IRQ_IOP331_PERFMON IOP331_IRQ(15) -#define IRQ_IOP331_CORE_PMU IOP331_IRQ(16) -#define IRQ_IOP331_RSVD_17 IOP331_IRQ(17) -#define IRQ_IOP331_RSVD_18 IOP331_IRQ(18) -#define IRQ_IOP331_RSVD_19 IOP331_IRQ(19) -#define IRQ_IOP331_RSVD_20 IOP331_IRQ(20) -#define IRQ_IOP331_RSVD_21 IOP331_IRQ(21) -#define IRQ_IOP331_RSVD_22 IOP331_IRQ(22) -#define IRQ_IOP331_RSVD_23 IOP331_IRQ(23) -#define IRQ_IOP331_XINT0 IOP331_IRQ(24) -#define IRQ_IOP331_XINT1 IOP331_IRQ(25) -#define IRQ_IOP331_XINT2 IOP331_IRQ(26) -#define IRQ_IOP331_XINT3 IOP331_IRQ(27) -#define IRQ_IOP331_RSVD_28 IOP331_IRQ(28) -#define IRQ_IOP331_RSVD_29 IOP331_IRQ(29) -#define IRQ_IOP331_RSVD_30 IOP331_IRQ(30) -#define IRQ_IOP331_RSVD_31 IOP331_IRQ(31) -#define IRQ_IOP331_XINT8 IOP331_IRQ(32) // 0 -#define IRQ_IOP331_XINT9 IOP331_IRQ(33) // 1 -#define IRQ_IOP331_XINT10 IOP331_IRQ(34) // 2 -#define IRQ_IOP331_XINT11 IOP331_IRQ(35) // 3 -#define IRQ_IOP331_XINT12 IOP331_IRQ(36) // 4 -#define IRQ_IOP331_XINT13 IOP331_IRQ(37) // 5 -#define IRQ_IOP331_XINT14 IOP331_IRQ(38) // 6 -#define IRQ_IOP331_XINT15 IOP331_IRQ(39) // 7 -#define IRQ_IOP331_RSVD_40 IOP331_IRQ(40) // 8 -#define IRQ_IOP331_RSVD_41 IOP331_IRQ(41) // 9 -#define IRQ_IOP331_RSVD_42 IOP331_IRQ(42) // 10 -#define IRQ_IOP331_RSVD_43 IOP331_IRQ(43) // 11 -#define IRQ_IOP331_RSVD_44 IOP331_IRQ(44) // 12 -#define IRQ_IOP331_RSVD_45 IOP331_IRQ(45) // 13 -#define IRQ_IOP331_RSVD_46 IOP331_IRQ(46) // 14 -#define IRQ_IOP331_RSVD_47 IOP331_IRQ(47) // 15 -#define IRQ_IOP331_RSVD_48 IOP331_IRQ(48) // 16 -#define IRQ_IOP331_RSVD_49 IOP331_IRQ(49) // 17 -#define IRQ_IOP331_RSVD_50 IOP331_IRQ(50) // 18 -#define IRQ_IOP331_UART0 IOP331_IRQ(51) // 19 -#define IRQ_IOP331_UART1 IOP331_IRQ(52) // 20 -#define IRQ_IOP331_PBIE IOP331_IRQ(53) // 21 -#define IRQ_IOP331_ATU_CRW IOP331_IRQ(54) // 22 -#define IRQ_IOP331_ATU_ERR IOP331_IRQ(55) // 23 -#define IRQ_IOP331_MCU_ERR IOP331_IRQ(56) // 24 -#define IRQ_IOP331_DMA0_ERR IOP331_IRQ(57) // 25 -#define IRQ_IOP331_DMA1_ERR IOP331_IRQ(58) // 26 -#define IRQ_IOP331_RSVD_59 IOP331_IRQ(59) // 27 -#define IRQ_IOP331_AA_ERR IOP331_IRQ(60) // 28 -#define IRQ_IOP331_RSVD_61 IOP331_IRQ(61) // 29 -#define IRQ_IOP331_MSG_ERR IOP331_IRQ(62) // 30 -#define IRQ_IOP331_HPI IOP331_IRQ(63) // 31 - -#define NR_IRQS (IOP331_IRQ(63) + 1) +#define NR_IRQS 64 /* |