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authorDeepak Saxena <dsaxena@plexity.net>2006-01-05 21:59:29 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-01-05 21:59:29 +0100
commit54e269ead6e672325866037b0617a72edd1396b9 (patch)
tree3076c2e0187657daed3054d511b62dc33a4c8f8b /include/asm-arm/arch-ixp4xx/gtwx5715.h
parent[ARM] 3217/1: iop331 uarts as platform devices (diff)
downloadlinux-54e269ead6e672325866037b0617a72edd1396b9.tar.xz
linux-54e269ead6e672325866037b0617a72edd1396b9.zip
[ARM] 3226/1: IXP4xx runtime expansion bus window size configuration
Patch from Deepak Saxena The expansion bus on the IXP46x NPU can be configured for either 32MiB or 16MiB windows and changing the configuration causes the base address for each chip select for each region to change. Because of this, we cannot hardcode the physical base as we currently do. This patch checks the expansion bus configuration registers at runtime to determine the appropriate window size. Note that this requires that the bootloader already configured the device sizes appropriately, but I feel that is valid assumption to make as the bootloader must configure and access the flash window, the output display (LCD, LEDs, etc) window, and other expansion bus devices. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ixp4xx/gtwx5715.h')
-rw-r--r--include/asm-arm/arch-ixp4xx/gtwx5715.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/include/asm-arm/arch-ixp4xx/gtwx5715.h b/include/asm-arm/arch-ixp4xx/gtwx5715.h
index fc460af70627..c3069d67c00e 100644
--- a/include/asm-arm/arch-ixp4xx/gtwx5715.h
+++ b/include/asm-arm/arch-ixp4xx/gtwx5715.h
@@ -57,10 +57,6 @@
#define GTWX5715_GPIO13_IRQ IRQ_IXP4XX_SW_INT1
#define GTWX5715_GPIO14_IRQ IRQ_IXP4XX_SW_INT2
-
-#define GTWX5715_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
-#define GTWX5715_FLASH_SIZE (0x00800000)
-
/* PCI controller GPIO to IRQ pin mappings
INTA INTB