diff options
| author | Andrew Victor <andrew@sanpeople.com> | 2007-05-11 22:01:28 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-11 23:02:48 +0200 |
| commit | c53c9cf60e49119e97d38390849cac5b2f0a0981 (patch) | |
| tree | 37615dedbbd8980b8357df47d90843eb86d017ff /include/asm-arm/arch-ks8695/regs-timer.h | |
| parent | [ARM] 4371/1: AT91: Support for Atmel AT91SAM9RL-EK development board (diff) | |
| download | linux-c53c9cf60e49119e97d38390849cac5b2f0a0981.tar.xz linux-c53c9cf60e49119e97d38390849cac5b2f0a0981.zip | |
[ARM] 4331/3: Support for Micrel/Kendin KS8695 processor
Add core support for the Kendin/Micrel KS8695 processor family.
It is an ARM922-T based SoC with integrated USART, 4-port Ethernet
Switch, WAN Ethernet port, and optional PCI Host bridge, etc.
http://www.micrel.com/page.do?page=product-info/sys_on_chip.jsp
This patch is based on earlier patches from Lennert Buytenhek, Ben
Dooks and Greg Ungerer posted to the arm-linux-kernel mailing list in
March 2006; and Micrel's 2.6.9 port.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ks8695/regs-timer.h')
| -rw-r--r-- | include/asm-arm/arch-ks8695/regs-timer.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ks8695/regs-timer.h b/include/asm-arm/arch-ks8695/regs-timer.h new file mode 100644 index 000000000000..0a9f7f99ec52 --- /dev/null +++ b/include/asm-arm/arch-ks8695/regs-timer.h @@ -0,0 +1,40 @@ +/* + * include/asm-arm/arch-ks8695/regs-timer.h + * + * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk> + * Copyright (C) 2006 Simtec Electronics + * + * KS8695 - Timer registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_TIMER_H +#define KS8695_TIMER_H + +#define KS8695_TMR_OFFSET (0xF0000 + 0xE400) +#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET) +#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET) + + +/* + * Timer registers + */ +#define KS8695_TMCON (0x00) /* Timer Control Register */ +#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */ +#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */ +#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */ +#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */ + + +/* Timer Control Register */ +#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */ +#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */ + +/* Timer0 Timeout Counter Register */ +#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ + + +#endif |