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authorDavid Woodhouse <dwmw2@infradead.org>2007-07-23 11:20:10 +0200
committerDavid Woodhouse <dwmw2@infradead.org>2007-07-23 11:20:10 +0200
commit39fe5434cb9de5da40510028b17b96bc4eb312b3 (patch)
tree7a02a317b9ad57da51ca99887c119e779ccf3f13 /include/asm-arm/arch-mxc/entry-macro.S
parent[JFFS2] Add declaration of jffs2_lzo_{init,exit} to compr.h (diff)
parentLinux 2.6.23-rc1 (diff)
downloadlinux-39fe5434cb9de5da40510028b17b96bc4eb312b3.tar.xz
linux-39fe5434cb9de5da40510028b17b96bc4eb312b3.zip
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include/asm-arm/arch-mxc/entry-macro.S')
-rw-r--r--include/asm-arm/arch-mxc/entry-macro.S39
1 files changed, 39 insertions, 0 deletions
diff --git a/include/asm-arm/arch-mxc/entry-macro.S b/include/asm-arm/arch-mxc/entry-macro.S
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+/*
+ * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+ @ this macro disables fast irq (not implemented)
+ .macro disable_fiq
+ .endm
+
+ .macro get_irqnr_preamble, base, tmp
+ .endm
+
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
+
+ @ this macro checks which interrupt occured
+ @ and returns its number in irqnr
+ @ and returns if an interrupt occured in irqstat
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ ldr \base, =AVIC_IO_ADDRESS(AVIC_BASE_ADDR)
+ @ Load offset & priority of the highest priority
+ @ interrupt pending from AVIC_NIVECSR
+ ldr \irqstat, [\base, #0x40]
+ @ Shift to get the decoded IRQ number, using ASR so
+ @ 'no interrupt pending' becomes 0xffffffff
+ mov \irqnr, \irqstat, asr #16
+ @ set zero flag if IRQ + 1 == 0
+ adds \tmp, \irqnr, #1
+ .endm
+
+ @ irq priority table (not used)
+ .macro irq_prio_table
+ .endm