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authorPaul Walmsley <paul@pwsan.com>2008-07-03 11:24:45 +0200
committerTony Lindgren <tony@atomide.com>2008-07-03 11:24:45 +0200
commit542313cc98e72d026d2df86f515699dfaface460 (patch)
tree94bc87268a67cd1fff2d63cf48761f137384607d /include/asm-arm/arch-omap
parentARM: OMAP: Add OMAP chip type structure; clean up mach-omap2/id.c (diff)
downloadlinux-542313cc98e72d026d2df86f515699dfaface460.tar.xz
linux-542313cc98e72d026d2df86f515699dfaface460.zip
ARM: OMAP2: Clock: Add OMAP3 DPLL autoidle functions
This patch adds support for DPLL autoidle control to the OMAP3 clock framework. These functions will be used by the noncore DPLL enable and disable code - this is because, according to the CDP code, the DPLL autoidle status must be saved and restored across DPLL lock/bypass/off transitions. N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather than just two. This code currently does not support the third option, low-power bypass autoidle. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/asm-arm/arch-omap')
-rw-r--r--include/asm-arm/arch-omap/clock.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
index 8490fbba39d1..22daa5d64d35 100644
--- a/include/asm-arm/arch-omap/clock.h
+++ b/include/asm-arm/arch-omap/clock.h
@@ -34,11 +34,16 @@ struct dpll_data {
u32 mult_mask;
u32 div1_mask;
# if defined(CONFIG_ARCH_OMAP3)
+ u8 modes;
void __iomem *control_reg;
u32 enable_mask;
u8 auto_recal_bit;
u8 recal_en_bit;
u8 recal_st_bit;
+ void __iomem *autoidle_reg;
+ u32 autoidle_mask;
+ void __iomem *idlest_reg;
+ u8 idlest_bit;
# endif
};