diff options
| author | Marc-Andre Hebert <marcandreh@humanware.ca> | 2006-03-30 11:24:08 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-03-30 11:24:08 +0200 |
| commit | fd88dd740ad7b92cd399b6116dfa9486b36ffaff (patch) | |
| tree | 1d322e8e8a458bf7a0af9b616d97d2c5bb958a49 /include/asm-arm/arch-pxa/pxa-regs.h | |
| parent | [ARM] 3425/1: xsc3: need to include pgtable-hwdef.h (diff) | |
| download | linux-fd88dd740ad7b92cd399b6116dfa9486b36ffaff.tar.xz linux-fd88dd740ad7b92cd399b6116dfa9486b36ffaff.zip | |
[ARM] 3434/1: pxa i2s amsl define
Patch from Marc-Andre Hebert
The error concerns a bit mask define for the AMSL bit of the SACR1 register in the 2.6 kernel tree. The AMSL is bit 0 and it was defined as so in the 2.4 kernel tree but it is inccorrectly set as bit 1 (a reserved bit) in the 2.6 kernel tree.
Signed-off-by: Marc-Andre Hebert <marcandreh@humanware.ca>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-pxa/pxa-regs.h')
| -rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 1409c5bd703f..c8f53a71c076 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -485,7 +485,7 @@ #define SACR1_ENLBF (1 << 5) /* Enable Loopback */ #define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ #define SACR1_DREC (1 << 3) /* Disable Recording Function */ -#define SACR1_AMSL (1 << 1) /* Specify Alternate Mode */ +#define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ #define SASR0_I2SOFF (1 << 7) /* Controller Status */ #define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */ |