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authorLen Brown <len.brown@intel.com>2005-12-06 23:31:30 +0100
committerLen Brown <len.brown@intel.com>2005-12-06 23:31:30 +0100
commit3d5271f9883cba7b54762bc4fe027d4172f06db7 (patch)
treeab8a881a14478598a0c8bda0d26c62cdccfffd6d /include/asm-arm/assembler.h
parent[ACPI] 8250_acpi.c buildfix (diff)
parentAuto-update from upstream (diff)
downloadlinux-3d5271f9883cba7b54762bc4fe027d4172f06db7.tar.xz
linux-3d5271f9883cba7b54762bc4fe027d4172f06db7.zip
Pull release into acpica branch
Diffstat (limited to 'include/asm-arm/assembler.h')
-rw-r--r--include/asm-arm/assembler.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index 69a28f96bee2..f31ac92b6c7f 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -83,10 +83,13 @@
* Save the current IRQ state and disable IRQs. Note that this macro
* assumes FIQs are enabled, and that the processor is in SVC mode.
*/
- .macro save_and_disable_irqs, oldcpsr, temp
+ .macro save_and_disable_irqs, oldcpsr
mrs \oldcpsr, cpsr
- mov \temp, #PSR_I_BIT | MODE_SVC
- msr cpsr_c, \temp
+#if __LINUX_ARM_ARCH__ >= 6
+ cpsid i
+#else
+ msr cpsr_c, #PSR_I_BIT | MODE_SVC
+#endif
.endm
/*