diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2006-07-01 23:30:09 +0200 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-07-01 23:30:09 +0200 |
commit | 4a2581a080098ca3a0c4e416d7a282e96c75ebf8 (patch) | |
tree | 6709b53f00a271fe8dd76b6cfb821419c8afb206 /include/asm-arm/spinlock.h | |
parent | [ARM] 3690/1: genirq: Introduce and make use of dummy irq chip (diff) | |
download | linux-4a2581a080098ca3a0c4e416d7a282e96c75ebf8.tar.xz linux-4a2581a080098ca3a0c4e416d7a282e96c75ebf8.zip |
[ARM] 3692/1: ARM: coswitch irq handling to the generic implementation
Patch from Thomas Gleixner
From: Thomas Gleixner <tglx@linutronix.de>
Switch the ARM irq core handling to the generic implementation. The
ARM specific header files now contain mostly migration stubs and
helper macros. Note that each machine type must be converted after
this step seperately. This was seperated out from the patch for easier
review.
The main changes for the machine type code is the conversion of the
type handlers to a 'type flow' and 'chip' model. This affects only the
multiplex interrupt handlers. A conversion macro needs to be added to
those implementations, which defines the data structure which is
registered by the set_irq_chained_handler() macro.
Some minor fixups of include files and the conversion of data
structure access is necessary all over the place.
The mostly macro based conversion was provided to allow an easy
migration of the existing implementations.
The code compiles on all defconfigs available in arch/arm/configs
except those which were broken also before applying the conversion
patches.
The code has been boot and runtime tested on most ARM platforms. The
results of an extensive testing and bugfixing series can be found
at: http://www.linutronix.de/index.php?page=testing
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/spinlock.h')
0 files changed, 0 insertions, 0 deletions