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author | Paul Mackerras <paulus@samba.org> | 2006-03-09 04:32:05 +0100 |
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committer | Paul Mackerras <paulus@samba.org> | 2006-03-09 04:32:05 +0100 |
commit | 516450179454de9e689e0a53ed8f34b896e8651c (patch) | |
tree | 78eae2f77de6cd39b18c7393fc5854456fc3fb1f /include/asm-arm/tlbflush.h | |
parent | Merge ../powerpc-merge (diff) | |
parent | Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc-merge (diff) | |
download | linux-516450179454de9e689e0a53ed8f34b896e8651c.tar.xz linux-516450179454de9e689e0a53ed8f34b896e8651c.zip |
Merge ../linux-2.6
Diffstat (limited to 'include/asm-arm/tlbflush.h')
-rw-r--r-- | include/asm-arm/tlbflush.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h index 9387a5e1ffe0..0c2acc944a0a 100644 --- a/include/asm-arm/tlbflush.h +++ b/include/asm-arm/tlbflush.h @@ -340,6 +340,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); if (tlb_flag(TLB_V6_I_PAGE)) asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); + + /* The ARM ARM states that the completion of a TLB maintenance + * operation is only guaranteed by a DSB instruction + */ + if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE)) + asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); } /* |