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authorAndrew Victor <andrew@sanpeople.com>2007-05-31 11:16:00 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-06-03 18:52:35 +0200
commit0e5f82dda5e60a21cf8ba4f77334d60290277d2c (patch)
tree1b4dc2efb911f37d613ea3ee37468bfa9ceb4248 /include/asm-arm
parent[ARM] Solve buggy smp_processor_id() usage (diff)
downloadlinux-0e5f82dda5e60a21cf8ba4f77334d60290277d2c.tar.xz
linux-0e5f82dda5e60a21cf8ba4f77334d60290277d2c.zip
[ARM] 4421/1: AT91: Value of _KEY fields.
Use the actual value (0xA5) for the AT91_SHDW_KEY and AT91_WDT_KEY register fields instead of a bitmask. This is consistent with how AT91_RSTC_KEY is defined, and is easier to use in code. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-at91/at91_shdwc.h4
-rw-r--r--include/asm-arm/arch-at91/at91_wdt.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-arm/arch-at91/at91_shdwc.h b/include/asm-arm/arch-at91/at91_shdwc.h
index 795fcc266228..01b433de2272 100644
--- a/include/asm-arm/arch-at91/at91_shdwc.h
+++ b/include/asm-arm/arch-at91/at91_shdwc.h
@@ -14,8 +14,8 @@
#define AT91_SHDWC_H
#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */
-#define AT91_SHDW_SHDW (1 << 0) /* Processor Reset */
-#define AT91_SHDW_KEY (0xff << 24) /* KEY Password */
+#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
+#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */
#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
diff --git a/include/asm-arm/arch-at91/at91_wdt.h b/include/asm-arm/arch-at91/at91_wdt.h
index 7251a344c740..1014e9bf181f 100644
--- a/include/asm-arm/arch-at91/at91_wdt.h
+++ b/include/asm-arm/arch-at91/at91_wdt.h
@@ -15,7 +15,7 @@
#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */
#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
-#define AT91_WDT_KEY (0xff << 24) /* KEY Password */
+#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */
#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */