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authorMichael Hennerich <michael.hennerich@analog.com>2007-10-29 09:55:18 +0100
committerBryan Wu <bryan.wu@analog.com>2007-10-29 09:55:18 +0100
commit64307f7db3690140a16c6748e65068f8a279877c (patch)
treea196c7c727711026c8cf7abfc7325a4ea47dba23 /include/asm-blackfin
parentBlackfin arch: Added support for HV Sistemas H8606 board (diff)
downloadlinux-64307f7db3690140a16c6748e65068f8a279877c.tar.xz
linux-64307f7db3690140a16c6748e65068f8a279877c.zip
Blackfin arch: add NFC driver support in BF527-EZKIT board
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r--include/asm-blackfin/mach-bf527/dma.h7
-rw-r--r--include/asm-blackfin/mach-bf548/portmux.h14
2 files changed, 20 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf527/dma.h b/include/asm-blackfin/mach-bf527/dma.h
index a41627ae9134..2dfee12864f6 100644
--- a/include/asm-blackfin/mach-bf527/dma.h
+++ b/include/asm-blackfin/mach-bf527/dma.h
@@ -35,7 +35,6 @@
#define MAX_BLACKFIN_DMA_CHANNEL 16
#define CH_PPI 0 /* PPI receive/transmit or NFC */
-#define CH_NFC 0 /* PPI receive/transmit or NFC */
#define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */
#define CH_EMAC_HOSTDP 1 /* Ethernet MAC receive or HOSTDP */
#define CH_EMAC_TX 2 /* Ethernet MAC transmit or NFC */
@@ -54,6 +53,12 @@
#define CH_MEM_STREAM1_DEST 14 /* TX */
#define CH_MEM_STREAM1_SRC 15 /* RX */
+#if defined(CONFIG_BF527_NAND_D_PORTF)
+#define CH_NFC CH_PPI /* PPI receive/transmit or NFC */
+#elif defined(CONFIG_BF527_NAND_D_PORTH)
+#define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */
+#endif
+
extern int channel2irq(unsigned int channel);
extern struct dma_register *base_addr[];
diff --git a/include/asm-blackfin/mach-bf548/portmux.h b/include/asm-blackfin/mach-bf548/portmux.h
index b382deb501a7..6b485120015f 100644
--- a/include/asm-blackfin/mach-bf548/portmux.h
+++ b/include/asm-blackfin/mach-bf548/portmux.h
@@ -267,4 +267,18 @@
#define P_AMC_BG (P_DEFINED | P_IDENT(GPIO_PJ12) | P_FUNCT(0))
#define P_AMC_BGH (P_DEFINED | P_IDENT(GPIO_PJ13) | P_FUNCT(0))
+
+#define P_NAND_D0 (P_DONTCARE)
+#define P_NAND_D1 (P_DONTCARE)
+#define P_NAND_D2 (P_DONTCARE)
+#define P_NAND_D3 (P_DONTCARE)
+#define P_NAND_D4 (P_DONTCARE)
+#define P_NAND_D5 (P_DONTCARE)
+#define P_NAND_D6 (P_DONTCARE)
+#define P_NAND_D7 (P_DONTCARE)
+#define P_NAND_WE (P_DONTCARE)
+#define P_NAND_RE (P_DONTCARE)
+#define P_NAND_CLE (P_DONTCARE)
+#define P_NAND_ALE (P_DONTCARE)
+
#endif /* _MACH_PORTMUX_H_ */