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author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2014-09-15 16:09:44 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2014-09-23 17:51:39 +0200 |
commit | 7ca267faba8ad097f57cb71c32ae1865de83241a (patch) | |
tree | d8ae52f88f30ef5e170a39bd0695091cdfa1769c /include/asm-generic/gpio.h | |
parent | gpio: use container_of to resolve cs5535_gpio_chip from gpio_chip (diff) | |
download | linux-7ca267faba8ad097f57cb71c32ae1865de83241a.tar.xz linux-7ca267faba8ad097f57cb71c32ae1865de83241a.zip |
gpio: Increase ARCH_NR_GPIOs to 512
Some newer Intel SoCs, like Braswell already have more than 256 GPIOs
available so the default limit is exceeded. Instead of adding more
architecture specific gpio.h files with custom ARCH_NR_GPIOs we increase
the gpiolib default limit to be twice the current.
Current generic ARCH_NR_GPIOS limit is 256 which starts to be too small
for newer Intel SoCs like Braswell. In order to support GPIO controllers
on these SoCs we increase ARCH_NR_GPIOS to be 512 which should be
sufficient for now.
The kernel size increases a bit with this change. Below is an example of
x86_64 kernel image.
ARCH_NR_GPIOS=256
text data bss dec hex filename
11476173 1971328 1265664 14713165 e0814d vmlinux
ARCH_NR_GPIOS=512
text data bss dec hex filename
11476173 1971328 1269760 14717261 e0914d vmlinux
So the BSS size and this the kernel image size increases by 4k.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to '')
-rw-r--r-- | include/asm-generic/gpio.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index c1d4105e1c1d..383ade1a211b 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -27,7 +27,7 @@ */ #ifndef ARCH_NR_GPIOS -#define ARCH_NR_GPIOS 256 +#define ARCH_NR_GPIOS 512 #endif /* |