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authorThomas Gleixner <tglx@linutronix.de>2020-08-26 01:36:07 +0200
committerThomas Gleixner <tglx@linutronix.de>2020-08-26 01:36:07 +0200
commitceb2465c51195967f11f6507538579816ac67cb8 (patch)
treeeab534b1062608e36a7b54ccc7be693625f235b8 /include/asm-generic/io.h
parentgenirq: Unlock irq descriptor after errors (diff)
parentirqchip/ingenic: Leave parent IRQ unmasked on suspend (diff)
downloadlinux-ceb2465c51195967f11f6507538579816ac67cb8.tar.xz
linux-ceb2465c51195967f11f6507538579816ac67cb8.zip
Merge tag 'irqchip-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip fixes from Marc Zyngier: - Revert the wholesale conversion to platform drivers of the pdc, sysirq and cirq drivers, as it breaks a number of platforms even when the driver is built-in (probe ordering bites you). - Prevent interrupt from being lost with the STM32 exti driver - Fix wake-up interrupts for the MIPS Ingenic driver - Fix an embarassing typo in the new module helpers, leading to the probe failing most of the time - The promised TI firmware rework that couldn't make it into the merge window due to a very badly managed set of dependencies
Diffstat (limited to 'include/asm-generic/io.h')
-rw-r--r--include/asm-generic/io.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index 30a3aab312e6..dabf8cb7203b 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -163,7 +163,7 @@ static inline u16 readw(const volatile void __iomem *addr)
u16 val;
__io_br();
- val = __le16_to_cpu(__raw_readw(addr));
+ val = __le16_to_cpu((__le16 __force)__raw_readw(addr));
__io_ar(val);
return val;
}
@@ -176,7 +176,7 @@ static inline u32 readl(const volatile void __iomem *addr)
u32 val;
__io_br();
- val = __le32_to_cpu(__raw_readl(addr));
+ val = __le32_to_cpu((__le32 __force)__raw_readl(addr));
__io_ar(val);
return val;
}
@@ -212,7 +212,7 @@ static inline void writeb(u8 value, volatile void __iomem *addr)
static inline void writew(u16 value, volatile void __iomem *addr)
{
__io_bw();
- __raw_writew(cpu_to_le16(value), addr);
+ __raw_writew((u16 __force)cpu_to_le16(value), addr);
__io_aw();
}
#endif
@@ -222,7 +222,7 @@ static inline void writew(u16 value, volatile void __iomem *addr)
static inline void writel(u32 value, volatile void __iomem *addr)
{
__io_bw();
- __raw_writel(__cpu_to_le32(value), addr);
+ __raw_writel((u32 __force)__cpu_to_le32(value), addr);
__io_aw();
}
#endif
@@ -474,7 +474,7 @@ static inline u16 _inw(unsigned long addr)
u16 val;
__io_pbr();
- val = __le16_to_cpu(__raw_readw(PCI_IOBASE + addr));
+ val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
__io_par(val);
return val;
}
@@ -487,7 +487,7 @@ static inline u32 _inl(unsigned long addr)
u32 val;
__io_pbr();
- val = __le32_to_cpu(__raw_readl(PCI_IOBASE + addr));
+ val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
__io_par(val);
return val;
}
@@ -508,7 +508,7 @@ static inline void _outb(u8 value, unsigned long addr)
static inline void _outw(u16 value, unsigned long addr)
{
__io_pbw();
- __raw_writew(cpu_to_le16(value), PCI_IOBASE + addr);
+ __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
__io_paw();
}
#endif
@@ -518,7 +518,7 @@ static inline void _outw(u16 value, unsigned long addr)
static inline void _outl(u32 value, unsigned long addr)
{
__io_pbw();
- __raw_writel(cpu_to_le32(value), PCI_IOBASE + addr);
+ __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
__io_paw();
}
#endif