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authorMauro Carvalho Chehab <mchehab@s-opensource.com>2016-10-05 21:42:36 +0200
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2016-10-05 21:43:53 +0200
commit9fce0c226536fc36c7fb0a80000ca38a995be43e (patch)
treed1d03d4a831bb143ffd401cefa0f44f636ac0084 /include/asm-generic/qrwlock.h
parent[media] ttusb_dec: avoid the risk of go past buffer (diff)
parentLinux 4.8 (diff)
downloadlinux-9fce0c226536fc36c7fb0a80000ca38a995be43e.tar.xz
linux-9fce0c226536fc36c7fb0a80000ca38a995be43e.zip
Merge tag 'v4.8' into patchwork
Linux 4.8 * tag 'v4.8': (1761 commits) Linux 4.8 ARM: 8618/1: decompressor: reset ttbcr fields to use TTBR0 on ARMv7 MIPS: CM: Fix mips_cm_max_vp_width for non-MT kernels on MT systems include/linux/property.h: fix typo/compile error ocfs2: fix deadlock on mmapped page in ocfs2_write_begin_nolock() mm: workingset: fix crash in shadow node shrinker caused by replace_page_cache_page() MAINTAINERS: Switch to kernel.org email address for Javi Merino x86/entry/64: Fix context tracking state warning when load_gs_index fails x86/boot: Initialize FPU and X86_FEATURE_ALWAYS even if we don't have CPUID x86/vdso: Fix building on big endian host x86/boot: Fix another __read_cr4() case on 486 sctp: fix the issue sctp_diag uses lock_sock in rcu_read_lock sctp: change to check peer prsctp_capable when using prsctp polices sctp: remove prsctp_param from sctp_chunk sctp: move sent_count to the memory hole in sctp_chunk tg3: Avoid NULL pointer dereference in tg3_io_error_detected() x86/init: Fix cr4_init_shadow() on CR4-less machines MIPS: Fix detection of unsupported highmem with cache aliases MIPS: Malta: Fix IOCU disable switch read for MIPS64 MIPS: Fix BUILD_ROLLBACK_PROLOGUE for microMIPS ...
Diffstat (limited to 'include/asm-generic/qrwlock.h')
-rw-r--r--include/asm-generic/qrwlock.h27
1 files changed, 25 insertions, 2 deletions
diff --git a/include/asm-generic/qrwlock.h b/include/asm-generic/qrwlock.h
index 54a8e65e18b6..7d026bf27713 100644
--- a/include/asm-generic/qrwlock.h
+++ b/include/asm-generic/qrwlock.h
@@ -25,7 +25,20 @@
#include <asm-generic/qrwlock_types.h>
/*
- * Writer states & reader shift and bias
+ * Writer states & reader shift and bias.
+ *
+ * | +0 | +1 | +2 | +3 |
+ * ----+----+----+----+----+
+ * LE | 78 | 56 | 34 | 12 | 0x12345678
+ * ----+----+----+----+----+
+ * | wr | rd |
+ * +----+----+----+----+
+ *
+ * ----+----+----+----+----+
+ * BE | 12 | 34 | 56 | 78 | 0x12345678
+ * ----+----+----+----+----+
+ * | rd | wr |
+ * +----+----+----+----+
*/
#define _QW_WAITING 1 /* A writer is waiting */
#define _QW_LOCKED 0xff /* A writer holds the lock */
@@ -134,12 +147,22 @@ static inline void queued_read_unlock(struct qrwlock *lock)
}
/**
+ * __qrwlock_write_byte - retrieve the write byte address of a queue rwlock
+ * @lock : Pointer to queue rwlock structure
+ * Return: the write byte address of a queue rwlock
+ */
+static inline u8 *__qrwlock_write_byte(struct qrwlock *lock)
+{
+ return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN);
+}
+
+/**
* queued_write_unlock - release write lock of a queue rwlock
* @lock : Pointer to queue rwlock structure
*/
static inline void queued_write_unlock(struct qrwlock *lock)
{
- smp_store_release((u8 *)&lock->cnts, 0);
+ smp_store_release(__qrwlock_write_byte(lock), 0);
}
/*