diff options
| author | Christoph Lameter <clameter@sgi.com> | 2007-05-12 20:15:24 +0200 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-12 20:26:22 +0200 |
| commit | f1d1a842d85acf34dd185027cb2c9b4fd13130ef (patch) | |
| tree | 99ec45adca911aeb145a56d75a213ebb900b2175 /include/asm-i386/pgtable.h | |
| parent | compat signalfd and timerfd are cond syscalls (diff) | |
| download | linux-f1d1a842d85acf34dd185027cb2c9b4fd13130ef.tar.xz linux-f1d1a842d85acf34dd185027cb2c9b4fd13130ef.zip | |
SLUB: i386 support
SLUB cannot run on i386 at this point because i386 uses the page->private and
page->index field of slab pages for the pgd cache.
Make SLUB run on i386 by replacing the pgd slab cache with a quicklist.
Limit the changes as much as possible. Leave the improvised linked list in place
etc etc. This has been working here for a couple of weeks now.
Acked-by: William Lee Irwin III <wli@holomorphy.com>
Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to '')
| -rw-r--r-- | include/asm-i386/pgtable.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h index edce9d51a676..2394589786ba 100644 --- a/include/asm-i386/pgtable.h +++ b/include/asm-i386/pgtable.h @@ -35,17 +35,16 @@ struct vm_area_struct; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) extern unsigned long empty_zero_page[1024]; extern pgd_t swapper_pg_dir[1024]; -extern struct kmem_cache *pgd_cache; extern struct kmem_cache *pmd_cache; extern spinlock_t pgd_lock; extern struct page *pgd_list; +void check_pgt_cache(void); void pmd_ctor(void *, struct kmem_cache *, unsigned long); -void pgd_ctor(void *, struct kmem_cache *, unsigned long); -void pgd_dtor(void *, struct kmem_cache *, unsigned long); void pgtable_cache_init(void); void paging_init(void); + /* * The Linux x86 paging architecture is 'compile-time dual-mode', it * implements both the traditional 2-level x86 page tables and the |